74lvq240 STMicroelectronics, 74lvq240 Datasheet

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74lvq240

Manufacturer Part Number
74lvq240
Description
Low Voltage Octal Bus Buffer With 3 State Outputs Inverted
Manufacturer
STMicroelectronics
Datasheet

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74LVQ240
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74lvq240M
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74lvq240MTR
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DESCRIPTION
The 74LVQ240 is a low voltage CMOS OCTAL
BUS BUFFER fabricated with sub-micron silicon
gate and double-layer metal wiring C
Figure 1: Pin Connection And IEC Logic Symbols
July 2004
HIGH SPEED:
t
COMPATIBLE WITH TTL OUTPUTS
LOW POWER DISSIPATION:
I
LOW NOISE:
V
75 TRANSMISSION LINE OUTPUT DRIVE
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
PCI BUS LEVELS GUARANTEED AT 24 mA
BALANCED PROPAGATION DELAYS:
t
OPERATING VOLTAGE RANGE:
V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 240
IMPROVED LATCH-UP IMMUNITY
PD
CC
PLH
OH
OLP
CC
= 6 ns (TYP.) at V
= 4 A (MAX.) at T
| = I
(OPR) = 2V to 3.6V (1.2V Data Retention)
= 0.4V (TYP.) at V
t
PHL
OL
= 12mA (MIN) at V
CC
A
=25°C
CC
= 3.3 V
= 3.3V
CC
= 3.0 V
WITH 3 STATE OUTPUTS (INVERTED)
LOW VOLTAGE OCTAL BUS BUFFER
2
MOS
Table 1: Order Codes
technology. It is ideal for low power and low noise
3.3V applications.
G output control governs four BUS BUFFERs.
This device is designed to be used with 3 state
memory address drivers, etc.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PACKAGE
TSSOP
SOP
SOP
74LVQ240
Rev. 7
74LVQ240MTR
74LVQ240TTR
TSSOP
T & R
1/12

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74lvq240 Summary of contents

Page 1

... CC PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 240 IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74LVQ240 is a low voltage CMOS OCTAL BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C Figure 1: Pin Connection And IEC Logic Symbols July 2004 LOW VOLTAGE OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (INVERTED ...

Page 2

... Figure 2: Input And Output Equivalent Circuit Table 3: Truth Table Don‘t Care Z : High Impedance Table 4: Absolute Maximum Ratings Symbol V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Current ...

Page 3

... A Typ. Max. Min. Max. Min. 2.0 2.0 0.8 0.8 2.99 2.9 2.9 2.48 2.48 2.2 2.2 0.002 0.1 0.1 0 0.36 0.44 0.55 0 -25 -25 Value = 25°C -40 to 85°C -55 to 125°C A Typ. Max. Min. Max. Min. 0.4 0.8 0.4 0.8 74LVQ240 Unit Max 0.1 0. Unit Max threshold ILD 3/12 ...

Page 4

... Table 8: AC Electrical Characteristics (C Symbol Parameter t t Propagation Delay PLH PHL Time 3 Output Enable PZL PZH Time 3 Output Disable PLZ PHZ Time 3.3 t Output To Output OSLH Skew Time t 3.3 OSHL (note1 Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch- ...

Page 5

... Figure 3: Test Circuit PLH PHL PZL PLZ PZH PHZ C = 50pF or equivalent (includes jig and probe capacitance 500 or equivalent pulse generator (typically OUT Figure 4: Waveform - Propagation Delays (f=1MHz; 50% duty cycle) TEST 74LVQ240 SWITCH Open 2V CC Open 5/12 ...

Page 6

... Figure 5: Waveform - Output Enable And Disable Time (f=1MHz; 50% duty cycle) 6/12 ...

Page 7

... MIN. A 2.35 A1 0.1 B 0.33 C 0.23 D 12. 10.00 h 0.25 L 0.4 k 0° ddd mm. TYP MAX. 2.65 0.093 0.30 0.004 0.51 0.013 0.32 0.009 13.00 0.496 7.6 0.291 1.27 10.65 0.394 0.75 0.010 1.27 0.016 8° 0.100 74LVQ240 inch MIN. TYP. 0.050 0° 0016022D MAX. 0.104 0.012 0.020 0.013 0.512 0.299 0.419 0.030 0.050 8° 0.004 7/12 ...

Page 8

... DIM. MIN 0.05 A2 0.8 b 0.19 c 0.09 D 6.4 E 6 0˚ PIN 1 IDENTIFICATION 1 8/12 TSSOP20 MECHANICAL DATA mm. TYP MAX. 1.2 0.15 1 1.05 0.30 0.20 6.5 6.6 6.4 6.6 4.4 4.48 0.65 BSC 8˚ 0.60 0. inch MIN. TYP. 0.002 0.004 0.031 0.039 0.007 0.004 0.252 0.256 0.244 0.252 0.169 0.173 0.0256 BSC 0˚ 0.018 0.024 ...

Page 9

... Tape & Reel SO-20 MECHANICAL DATA DIM. MIN 12 10.8 Bo 13.2 Ko 3.1 Po 3.9 P 11.9 mm. TYP MAX. 330 13.2 0.504 0.795 2.362 30.4 11 0.425 13.4 0.520 3.3 0.122 4.1 0.153 12.1 0.468 74LVQ240 inch MIN. TYP. MAX. 12.992 0.519 1.197 0.433 0.528 0.130 0.161 0.476 9/12 ...

Page 10

... Tape & Reel TSSOP20 MECHANICAL DATA DIM. MIN 12 6.8 Bo 6.9 Ko 1.7 Po 3.9 P 11.9 10/12 mm. TYP MAX. 330 13.2 0.504 0.795 2.362 22.4 7 0.268 7.1 0.272 1.9 0.067 4.1 0.153 12.1 0.468 inch MIN. TYP. MAX. 12.992 0.519 0.882 0.276 0.280 0.075 0.161 0.476 ...

Page 11

... Table 10: Revision History Date Revision 29-Jul-2004 7 Description of Changes Ordering Codes Revision - pag. 1. 74LVQ240 11/12 ...

Page 12

... Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...

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