m41t81 STMicroelectronics, m41t81 Datasheet - Page 20
m41t81
Manufacturer Part Number
m41t81
Description
Serial Access Real-time Clock With Alarms
Manufacturer
STMicroelectronics
Datasheet
1.M41T81.pdf
(30 pages)
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Clock operation
3.8
Note:
3.9
20/30
Output driver pin
When the FT Bit, AFE Bit, SQWE Bit, and Watchdog Register are not set, the
IRQ/FT/OUT/SQW pin becomes an output driver that reflects the contents of D7 of the
Control Register. In other words, when D7 (OUT Bit) and D6 (FT Bit) of address location 08h
are a '0,' then the IRQ/FT/OUT/SQW pin will be driven low.
The IRQ/FT/OUT/SQW pin is an open drain which requires an external pull-up resistor.
Preferred initial power-on default
Upon initial application of power to the device, the following register bits are set to a '0' state:
Watchdog Register; AFE; ABE; SQWE; and FT. The following bits are set to a '1' state: ST;
OUT; and HT (see
Table 5.
1.
2.
3.
Initial power-up
Subsequent power-up (with
battery back-up)
BMB0-BMB4, RB0, RB1.
State of other control bits undefined.
UC = unchanged
Condition
Preferred default values
(2)
(3)
Table 5 on page
UC
ST
1
20).
HT
1
1
Out
UC
1
FT
0
0
AFE
UC
0
SQWE
UC
0
ABE
UC
0
WATCHDOG
register
M41T81
0
0
(1)