m41t64 STMicroelectronics, m41t64 Datasheet - Page 21

• Manufacturer Part Number: m41t64
• Description: Serial Access Real-time Clock With Alarms
• Manufacturer: STMicroelectronics

Watchdog Timer
The watchdog timer can be used to detect an out-
of-control microprocessor. The user programs the
watchdog timer by setting the desired amount of
time-out into the Watchdog Register, address 09h.
Bits BMB4-BMB0 store a binary multiplier and the
three bits RB2-RB0 select the resolution where:
000=1/16 second (16Hz);
001=1/4 second (4Hz);
010=1 second (1Hz);
011=4 seconds (1/4Hz); and
100 = 1 minute (1/60Hz).
Note: Invalid combinations (101, 110, and 111) will
NOT enable a watchdog time-out. Setting the
BMB4-BMB0 = 0 with any combination of RB2-
RB0, other than 000, will result in an immediate
watchdog time-out.
The amount of time-out is then determined to be
the multiplication of the five-bit multiplier value with
the resolution. (For example: writing 00001110 in
the Watchdog Register = 3*1 or 3 seconds). If the
processor does not reset the timer within the spec-
ified period, the M41T6x sets the WDF (Watchdog
Flag) and generates an interrupt on the IRQ pin
(M41T62), or a watchdog output pulse (M41T63
and M41T65 only) on the WDO pin. The watchdog
timer can only be reset by having the microproces-
sor perform a WRITE of the Watchdog Register.
The time-out period then starts over.
Should the watchdog timer time-out, any value
may be written to the Watchdog Register in order
to clear the IRQ pin. A value of 00h will disable the
watchdog function until it is again programmed to
a new value. A READ of the Flags Register will re-
set the Watchdog Flag (Bit D7; Register 0Fh). The
watchdog function is automatically disabled upon
power-up, and the Watchdog Register is cleared.
Note: A WRITE to any clock register will restart
the watchdog timer.
Watchdog Output (WDO - M41T63/65 only)
If the processor does not reset the watchdog timer
within the specified period, the Watchdog Output
(WDO) will pulse low for t
17., page
the Reset input of the processor in order to gener-
ate a processor reset. After a watchdog time-out
occurs, the timer will remain disabled until such
time as a new countdown value is written into the
watchdog register.
Note: The crystal oscillator must be running for the
WDO pulse to be available.
The WDO output is an N-channel, open drain out-
put driver (with I
14., page
27). This output may be connected to
26).
OL
as specified in
M41T62/63/64/65
rec
(see
Table
Table
21/33