m48t201v STMicroelectronics, m48t201v Datasheet - Page 16

• Manufacturer Part Number: m48t201v
• Description: 5.0 Or 3.3v Timekeeper Supervisor
• Manufacturer: STMicroelectronics

3
3.1
3.2
3.3
Note:
3.4
16/35
Clock operation
TIMEKEEPER
The M48T201Y/V offers 16 internal registers which contain TIMEKEEPER
Watchdog, Flag, and Control data (see
locations which contain external (user accessible) and internal copies of the data (usually
referred to as BiPORT™ TIMEKEEPER cells). The external copies are independent of
internal functions except that they are updated periodically by the simultaneous transfer of
the incremented internal copy. TIMEKEEPER and Alarm Registers store data in BCD.
Control, Watchdog and Flags (Bits D0 to D3) Registers store data in Binary Format.
Reading the clock
Updates to the TIMEKEEPER registers should be halted before clock data is read to prevent
reading data in transition. The BiPORT TIMEKEEPER cells in the RAM array are only data
registers and not the actual clock counters, so updating the registers can be halted without
disturbing the clock itself.
Updating is halted when a '1' is written to the READ Bit, D6 in the Control Register
(7FFF8h). As long as a '1' remains in that position, updating is halted. After a halt is issued,
the registers reflect the count; that is, the day, date, and time that were current at the
moment the halt command was issued.
All of the TIMEKEEPER registers are updated simultaneously. A halt will not interrupt an
update in progress. Updating occurs approximately 1 second after the READ Bit is reset to a
'0.'
Setting the clock
Bit D7 of the Control Register (7FFF8h) is the WRITE Bit. Setting the WRITE Bit to a '1,' like
the READ Bit, halts updates to the TIMEKEEPER registers. The user can then load them
with the correct day, date, and time data in 24-hour BCD format (see
Resetting the WRITE Bit to a '0' then transfers the values of all time registers (7FFFFh-
7FFF9h, 7FFF1h) to the actual TIMEKEEPER counters and allows normal operation to
resume. After the WRITE Bit is reset, the next clock update will occur approximately one
second later.
Upon power-up following a power failure, both the WRITE Bit and the READ Bit will be reset
to '0.'
Stopping and starting the oscillator
The oscillator may be stopped at any time. If the device is going to spend a significant
amount of time on the shelf, the oscillator can be turned off to minimize current drain on the
battery. The STOP Bit is located at Bit D7 within the Seconds Register (7FFF9h). Setting it
to a '1' stops the oscillator. When reset to a '0,' the M48T201Y/V oscillator starts within one
second.
®
registers
Table 5 on page
17). These registers are memory
Table 5 on page
®
, Alarm,
17).