max5066auit Maxim Integrated Products, Inc., max5066auit Datasheet - Page 12
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max5066auit
Manufacturer Part Number
max5066auit
Description
Max5066 Configurable, Single-/dual-output, Synchronous Buck Controller For High-current Applications
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.MAX5066AUIT.pdf
(22 pages)
The MAX5066 includes overload fault protection circuit-
ry that prevents damage to the power MOSFETs. The
fault protection consists of two digital fault integration
blocks that enable “hiccuping” under overcurrent con-
ditions. This circuit works as follows: for every clock
cycle the current-limit threshold is exceeded, the fault
integration counter increments by one count. Thus, if
the current-limit condition persists, then the counter
reaches its shutdown threshold in 32,768 counts and
shuts down the external MOSFETs. When the MAX5066
shuts down due to a fault, the counter begins to count
down, (since the current-limit condition has ended),
once every 16 clock cycles. Thus, the device counts
down for 524,288 clock cycles. At this point, switching
resumes. This produces an effective duty cycle of
6.25% power-up and 93.75% power-down under fault
conditions. With a switching frequency set to 250kHz,
power-up and power-down times are approximately
131ms and 2.09s, respectively.
The MAX5066 uses an average current-mode control
topology to regulate the output voltage. The control
Configurable, Single-/Dual-Output, Synchronous
Buck Controller for High-Current Applications
Figure 2. Current and Voltage Loops
12
______________________________________________________________________________________
V
VEA1
REF
R
F
= 0.61V
CSN1
CA 1
Hiccup Fault Protection
CSP1
CEA1
2V
P-P
CLP1
Control Loop
CPWM1
R
CF
C
C
CFF
CF
DRIVE
loop consists of an inner current loop and an outer volt-
age loop. The inner current loop controls the output
current, while the outer voltage loop controls the output
voltage. The inner current loop absorbs the inductor
pole, reducing the order of the outer voltage loop to
that of a single-pole system.
gram of OUT1’s control loop.
The current loop consists of a current-sense resistor,
R
error amplifier (CEA1), an oscillator providing the carri-
er ramp, and a PWM comparator (CPWM1). The
precision current-sense amplifier (CA1) amplifies the
sense voltage across R
inverting input to CEA1 senses the output of CA1. The
output of CEA1 is the difference between the voltage-
error amplifier output (EAOUT1) and the gained-up volt-
age from CA1. The RC compensation network
connected to CLP1 provides external frequency com-
pensation for the respective CEA1 (see the
Compensation section). The start of every clock cycle
enables the high-side driver and initiates a PWM on-
cycle. Comparator CPWM1 compares the output volt-
age from CEA1 against a 0 to 2V ramp from the
SENSE
V
IN
, a current-sense amplifier (CA1), a current-
I
L
R
SENSE
SENSE
C
OUT
Figure 2
by a factor of 36. The
is the block dia-
V
LOAD
OUT1
R1
R2