max5100aeupt Maxim Integrated Products, Inc., max5100aeupt Datasheet - Page 3

• Manufacturer Part Number: max5100aeupt
• Description: Max5100 +2.7v To +5.5v, Low-power, Quad, Parallel 8-bit Dac With Rail-to-rail Voltage Outputs
• Manufacturer: Maxim Integrated Products, Inc.

ELECTRICAL CHARACTERISTICS (continued)
(V
= +3V and T
Note 1: Reduced digital code range (code 00 hex to code F0 hex) due to swing limitations when the output amplifier is loaded.
Note 2: Gain error is: [100 (V
Note 3: Output settling time is measured from the 50% point of the falling edge of WR to ±1/2LSB of V
Note 4: Channel-to-channel isolation is defined as the glitch energy at a DAC output in response to a full-scale step change on any
Note 5: Digital feedthrough is defined as the glitch energy at any DAC output in response to a full-scale step change on all eight
Note 6: R
Note 7: Timing measurement reference level is (V
Note 8: If LDAC is activated prior to WR’s rising edge, it must stay low for t
DYNAMIC PERFORMANCE
POWER SUPPLIES
DIGITAL TIMING (Figure 1) (Note 7)
Output Voltage Slew Rate
Output Settling Time (Note 3)
Channel-to-Channel Isolation
(Note 4)
Digital Feedthrough (Note 5)
Digital-to-Analog Glitch Impulse
Signal-to-Noise plus Distortion
Ratio
Multiplying Bandwidth
Wideband Amplifier Noise
Shutdown Recovery Time
Time to Shutdown
Power-Supply Voltage
Supply Current (Note 6)
Shutdown Current
Address to WR Setup
Address to WR Hold
Data to WR Setup
Data to WR Hold
WR Pulse Width
LDAC Pulse Width (Note 8)
DD
= V
REF
and V
other DAC output. The measured channel has a fixed code of 80 hex.
data inputs with WR at V
PARAMETER
L
= ∞, digital inputs at GND or V
A
= +2.7V to +5.5V, R
8-Bit DAC with Rail-to-Rail Voltage Outputs
= +25°C.)
F0,ideal
+2.7V to +5.5V, Low-Power, Quad, Parallel
_______________________________________________________________________________________
is the ideal DAC output voltage with input code F0 hex (i.e., V
F0,meas
L
DD
= 10kΩ, C
SYMBOL
.
SINAD
- ZCE - V
t
t
V
t
SDR
SDN
I
t
t
t
t
t
WR
DD
AH
DS
DH
AS
LD
DD
DD
L
.
= 100pF, T
F0,ideal
From code 00 to code F0 hex
To 1/2LSB, from code 10 to code F0 hex
Code 00 to code FF hex
Code 00 to code FF hex
Code 80 hex to code 7F hex
V
V
code = FF hex
REF = 0.5Vp-p, V
V
To ±1/2LSB of final value of V
I
DD
REF(DC)
DD
DD
IH
< 5µA
= 3V,
= 3V, -3dB bandwidth
+ V
) / V
IL
= 1.5V,
A
REF
) / 2.
= T
]. Where V
MIN
CONDITIONS
REF(DC)
to T
MAX
F0,meas
REF = 2.5Vp-p at
1kHz
REF = 2.5Vp-p at
10kHz
= 1.5V,
, unless otherwise noted. Typical values are at V
LD
OUT
(or longer) after WR goes high.
is the DAC output voltage with input code F0 hex,
REF
·
240 / 256).
MIN
2.7
25
20
20
5
0
0
OUT
’s final value.
0.001
TYP
500
650
370
0.6
0.5
90
70
60
60
13
20
6
MAX
700
5.5
1
DD
UNITS
µV
= V
V/µs
kHz
nVs
nVs
nVs
dB
µA
µA
µs
µs
µs
ns
ns
ns
ns
ns
ns
RMS
V
REF
3