max5121beee Maxim Integrated Products, Inc., max5121beee Datasheet - Page 9

• Manufacturer Part Number: max5121beee
• Description: 3v/5v, 12-bit, Serial Voltage-output Dacs With Internal Reference
• Manufacturer: Maxim Integrated Products, Inc.

The MAX5120/MAX5121 12-bit, voltage-output DACs
are easily configured with a 3-wire serial interface. They
include a 16-bit data-in/data-out shift register and have
a double-buffered input consisting of an input register
and a DAC register. In addition, these devices employ
precision bandgap references and trimmed internal
resistors to produce a gain of 1.6384V/V, maximizing
the output voltage swing (Figure 1). The MAX5120/
MAX5121 output amplifier’s offset-adjust pin allows for
a DC shift in the DAC outputs. The full-scale output volt-
age is +4.095V for the MAX5120 and +2.0475V for the
MAX5121. These DACs are designed with an inverted
R-2R ladder network (Figure 2) that produces a weight-
ed output voltage proportional to the digital input code.
Both the MAX5120 and MAX5121 use an on-board pre-
cision bandgap reference to generate an output volt-
age of +2.5V (MAX5120) or +1.25V (MAX5121). With a
low temperature coefficient of only 10ppm/°C (max),
the REF pin can source up to 100µA and may become
unstable with capacitive loads exceeding 100pF.
REFADJ can be used for minor adjustments (1%) to the
reference voltage. Use the circuits shown in Figure 3a
Figure 1. Simplified Functional Diagram
_______________Detailed Description
+3V/+5V, 12-Bit, Serial Voltage-Output DACs
( ) FOR MAX5121 ONLY
_______________________________________________________________________________________
RSTVAL
PDL
CLR
PD
CS
REFERENCE
BANDGAP
Internal Reference
CONTROL
DIN SCLK
SR
MAX5120
MAX5121
1.25V
4k
12
REFADJ
SHIFT REGISTER
16-BIT
V
(1X)
REGISTER
2X
DD
INPUT
REFERENCE
with Internal Reference
AGND DGND
BUFFER
2.5V, (1.25V)
CONTROL
Figure 2. Simplified Inverted R-2R DAC Structure
DECODE
AGND
REF*
*INTERNAL 2.5V (MAX5120) AND 1.25V (MAX5121)
SHOWN FOR ALL 1s ON DAC
OR EXTERNAL REFERENCE.
REGISTER
DAC
2R
2R
D0
R
DAC
REF
OUTPUT
LOGIC
2R
D9
GAIN = 1.6384X
R
0.6384R
R
2R
D10
R
2R
D11
DOUT
UPO
OS
OUT
R
0.6384R
OUT
OS
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