max5387laud Maxim Integrated Products, Inc., max5387laud Datasheet - Page 9

• Manufacturer Part Number: max5387laud
• Description: Dual, 256-tap, Volatile, Low-voltage Linear Taper Digital Potentiometer
• Manufacturer: Maxim Integrated Products, Inc.

The MAX5387 dual, 256-tap, volatile, low-voltage linear
taper digital potentiometer offers three end-to-end resis-
tance values of 10kI, 50kI, and 100kI. The potenti-
ometer consists of 255 fixed resistors in series between
terminals H_ and L_. The potentiometer wiper, W_, is
programmable to access any one of the 256 tap points
on the resistor string.
The potentiometers are programmable independently of
each other. The MAX5387 features an I
The I
the command and address bytes, routing the data to the
appropriate control registers. Data written to a control
register immediately updates the wiper position. Wipers
A and B power up in midposition, D[7:0] = 80H.
The MAX5387 operates as a slave device that receives
data through an I
interface. The interface uses a serial-data access (SDA)
line and a serial-clock line (SCL) to achieve bidirec-
tional communication between master(s) and slave(s). A
Figure 2. I
SMBus is a trademark of Intel Corp.
SDA
SCL
CONDITION
2
C interface contains a shift register that decodes
START
(S)
t
HD:STA
2
C Serial Interface Timing Diagram
t
LOW
t
_______________________________________________________________________________________
SU:DAT
2
C-/SMBusK-compatible 2-wire serial
t
R
Detailed Description
t
HIGH
Dual, 256-Tap, Volatile, Low-Voltage
t
F
I
t
HD-DAT
Linear Taper Digital Potentiometer
2
C Digital Interface
Serial Addressing
2
C interface.
t
SU:DTA
START CONDITION
REPEATED
(Sr)
master, typically a microcontroller, initiates all data trans-
fers to the MAX5387, and generates the SCL clock that
synchronizes the data transfer (Figure 2).
The MAX5387 SDA line operates as both an input and
an open-drain output. The SDA line requires a pullup
resistor, typically 4.7kI. The MAX5387 SCL line oper-
ates only as an input. The SCL line requires a pullup
resistor (typically 4.7kI) if there are multiple masters on
the 2-wire interface, or if the master in a single-master
system provides an open-drain SCL output.
Each transmission consists of a START (S) condition
(Figure 3) sent by a master, followed by the MAX5387
7-bit slave address plus the NOP/W bit (Figure 6), 1
command byte and 1 data byte, and finally a STOP (P)
condition (Figure 3).
SCL and SDA remain high when the interface is inactive.
A master controller signals the beginning of a transmis-
sion with a START condition by transitioning SDA from
high to low while SCL is high. The master controller issues
a STOP condition by transitioning the SDA from low to
high while SCL is high, after finishing communicating with
the slave. The bus is then free for another transmission.
t
HD:STA
ACKNOWLEDGE (A)
START and STOP Conditions
STOP CONDITION
t
SU:STD
(P)
t
BUF
START CONDITION
(S)
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