max5235 Maxim Integrated Products, Inc., max5235 Datasheet - Page 11

• Manufacturer Part Number: max5235
• Description: Single-supply 3v/5v, Voltage-output, Dual, Precision 12-bit Dacs
• Manufacturer: Maxim Integrated Products, Inc.

Figure 1. Serial Interface Timing
Figure 2. Detailed Serial Interface Timing
The 3-wire serial interface (SPI, QSPI, and MICROWIRE
compatible) used in the MAX5234/MAX5235 allows for
complete control of DAC operations (Figures 4 and 5).
Figures 1 and 2 show the timing for the serial interface.
The serial word consists of 3 control bits followed by 12
data bits (MSB first) and 1 sub-bit as described in
Tables 1, 2, and 3. When the 3 control bits are all zero
or all 1, D11–D8 are used as additional control bits,
allowing for greater DAC functionality.
The digital inputs allow any of the following: loading the
input register(s) without updating the DAC register(s),
updating the DAC register(s) from the input register(s),
or updating the input and DAC register(s) simultane-
Single-Supply 3V/5V, Voltage-Output, Dual,
SCLK
LDAC
SCLK
DIN
DIN
CS
CS
______________________________________________________________________________________
C2
1
C1
t
CSO
C0
D11 D10
Serial Interface
D9
t
CSS
D8
t
DS
D7
8
t
D6
CH
9
t
CSH
ously. The control bits and D11–D8 allow the DACs to
operate independently.
Send the 16-bit data as one 16-bit word (QSPI) or two
8-bit packets (SPI and MICROWIRE), with CS low dur-
ing this period. The control bits and D11–D8 determine
which registers update and the state of the registers
when exiting shutdown. The 3-bit control and D11–D8
determine the following:
The general timing diagram of Figure 1 illustrates data
acquisition. Driving CS low enables the device to
receive data. Otherwise, the interface control circuitry is
disabled. With CS low, data at DIN is clocked into the
D5
t
Precision 12-Bit DACs
CP
• Registers to be updated
• Selection of the power-down modes
D4
t
LDL
t
CL
D3
COMMAND EXECUTED
D2
t
D1
t
CSLD
DH
t
CS1
D0
t
CSW
S0
16
(1)
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