max5893egk-d Maxim Integrated Products, Inc., max5893egk-d Datasheet - Page 13
![no-image](/images/no-image-200.jpg)
max5893egk-d
Manufacturer Part Number
max5893egk-d
Description
Max5893 12-bit, 500msps Interpolating And Modulating Dual Dac With Cmos Inputs
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.MAX5893EGK-D.pdf
(33 pages)
When writing to the MAX5893, data is shifted into SDI;
data is shifted out of SDO in a read operation. Bits 0 to
3 of the control byte are the address bits. These bits set
the address of the register to be written to or read from.
Bits 4 to 6 of the control byte must always be set to 0.
Bit 7 is a read/write bit: 0 for write operation and 1 for
read operation. The most significant bit (MSB) is shifted
Figure 1. SPI Serial Interface Write Cycle, MSB-First Mode
Figure 2. SPI Serial Interface Read Cycle, MSB-First Mode
12-Bit, 500Msps Interpolating and Modulating
SCLK
SCLK
SDO
SDO
SDI
SDI
CS
CS
1 0 0 0 3 2 1 0
______________________________________________________________________________________
IMPEDANCE
0
ADDRESS
HIGH
READ CYCLE N - 1
0
0
DATA N - 2
0
IGNORED
DATA
A3
A2
1 0 0 0 3 2 1 0
IMPEDANCE
Dual DAC with CMOS Inputs
A1
HIGH
ADDRESS
HIGH IMPEDANCE
A0
READ CYCLE N
D7
in first in default mode. If the serial port is set to LSB-
first mode, both the control byte and data byte are shifted
LSB in first. Figures 1 and 2 show the SPI serial interface
operation in the default write and read mode, respectively.
Figure 3 is a timing diagram for the SPI serial interface.
DATA N - 1
D6
IGNORED
DATA
D5
D4
1 0 0 0 3 2 1 0
IMPEDANCE
ADDRESS
HIGH
D3
READ CYCLE N + 1
D2
D1
DATA N
IGNORED
DATA
D0
13