stlc1512 STMicroelectronics, stlc1512 Datasheet - Page 18

• Manufacturer Part Number: stlc1512
• Description: Northenlite?? G.lite Bicmos Analog Front-end Circuit
• Manufacturer: STMicroelectronics

STLC1512
The application requires some drop from the output of the hybrid balance to the input of the PGA in order to
keep the signal level at an acceptable level. (see Table 5) The input is reduced by placing a resistor between
the output of the hybrid balance network and PGAIN. This resistor (R
a resistor divider between the hybrid balance and the input. Second, it allows a capacitor to be placed across
the input of the PGA to create a first order low pass filter. This further reduces the signal in long loop cases.
The resistor divider is formed by the external resistor and the input impedance of the PGA. The gain from the
hybrid balance to the output of the PGA is therefore given by
where G
R
R
Equation can also be used to determine variations over process and temperature. To accomplish this just de-
termine the max and min values using the input resistance variation given in Table .
To convert the noise numbers in Table to line referred noise numbers use
Where N
V
H is the hybrid loss (9.54dB in the reference design),
and G is given by
18/26
input
ext
n
is the input referred noise from Table ,
is the resistance placed between the hybrid balance and PGAIN.
is the input impedance of the PGA given in Table
table
db
is the noise on the line in dBm/Hz,
is the gain number given in Table ,
Appendix A - PGA Gain Calculations
N
20
dB
log
G
=
10
=
----------------------------------
R
20
log
in put
R
log
in put
1000
------------ - V
100
+
R
----------------------------------
R
inp ut
ex t
R
2
n
inp ut
+
+
+
G
G
R
tab le
e xt
+
ext
H
) serves two purposes. First, it creates