cs5340 Cirrus Logic, Inc., cs5340 Datasheet

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cs5340

Manufacturer Part Number
cs5340
Description
101 Db, 192 Khz, Multi-bit Audio A/d Converter
Manufacturer
Cirrus Logic, Inc.
Datasheet

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Features
Single-Ended
Single-Ended
Analog Input
Analog Input
Advanced Multi-bit Delta-Sigma Architecture
24-bit Conversion
Supports All Audio Sample Rates Including
192 kHz
101 dB Dynamic Range at 5 V
-94 dB THD+N
90 mW Power Consumption
High-Pass Filter to Remove DC Offsets
Analog/Digital Core Supplies from 3.3 V to 5 V
Supports Logic Levels between 1.8 V and 5 V
Auto-detect Mode Selection in Slave Mode
Auto-Detect MCLK Divider
Pin Compatible with CS5341
http://www.cirrus.com
101 dB, 192 kHz, Multi-Bit Audio A/D Converter
AINR
AINL
FILT+
VQ
3.3 V to 5 V
Switch-Cap
ADC
Switch-Cap
ADC
Reference
Voltages
VA
Internal
High-Pass
High-Pass
Filter
Filter
Copyright © Cirrus Logic, Inc. 2008
3.3 V to 5 V
VD
(All Rights Reserved)
Confidential Draft
Digital Filters
Low-Latency
Digital Filters
Low-Latency
General Description
The CS5340 is a complete analog-to-digital converter
for digital audio systems. It performs sampling, analog-
to-digital conversion, and anti-alias filtering, generating
24-bit values for both left and right inputs in serial form
at sample rates up to 200 kHz per channel.
The CS5340 uses a 5th-order, multi-bit Delta-Sigma
modulator followed by digital filtering and decimation,
which removes the need for an external anti-alias filter.
The CS5340 is available in a 16-pin TSSOP package
for Commercial (-10° to +70° C) and Automotive grades
(-40° to +85° C). The CDB5340 Customer Demonstra-
tion Board is also available for device evaluation and
implementation suggestions. Please refer to
Information”
information.
The CS5340 is ideal for audio systems requiring wide
dynamic range, negligible distortion and low noise, such
as set-top boxes, DVD-karaoke players, DVD record-
ers, A/V receivers, and automotive applications.
3/11/08
on
page 22
1.8 V to 5 V
VL
MCLK Divider
Auto-detect
Slave Mode
Auto-detect
for
CS5340
M0
M1
complete
Mode
Configuration
Master Clock
Reset
SDOUT
March '08
SCLK
LRCK
“Ordering
DS601F2
ordering

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cs5340 Summary of contents

Page 1

... Board is also available for device evaluation and implementation suggestions. Please refer to Information” information. The CS5340 is ideal for audio systems requiring wide dynamic range, negligible distortion and low noise, such as set-top boxes, DVD-karaoke players, DVD record- ers, A/V receivers, and automotive applications. ...

Page 2

... Master Clock ......................................................................................................................... 17 4.3 Serial Audio Interface ..................................................................................................................... 17 4.4 Power-Up Sequence ...................................................................................................................... 18 4.5 Analog Connections ....................................................................................................................... 18 4.6 Grounding and Power Supply Decoupling ...................................................................................... 18 4.7 Synchronization of Multiple Devices ............................................................................................... 18 4.8 Capacitor Size on the Reference Pin (FILT+) ................................................................................ 19 5. PARAMETER DEFINITIONS ................................................................................................................ 20 6. PACKAGE DIMENSIONS ................................................................................................................... 21 THERMAL CHARACTERISTICS .......................................................................................................... 21 7. ORDERING INFORMATION ................................................................................................................ 22 8. REVISION HISTORY ............................................................................................................................ 22 2 Confidential Draft 3/11/08 CS5340 DS601F2 ...

Page 3

... Figure 17.Typical Connection Diagram ..................................................................................................... 14 Figure 18.CS5340 Master Mode Clocking ................................................................................................ 16 Figure 19.I²S Serial Audio Interface .......................................................................................................... 17 Figure 20.Left-Justified Serial Audio Interface .......................................................................................... 17 Figure 21.CS5340 Recommended Analog Input Buffer ............................................................................ 18 Figure 22.CS5340 THD+N versus Frequency .......................................................................................... 19 LIST OF TABLES Table 1. Speed Modes and the Associated Output Sample Rates (Fs) .................................................... 15 Table 2 ...

Page 4

... Symbol Min Analog VA 3.1 Digital VD 3.1 Logic VL 1.7 Commercial T -10 AC Automotive T -40 AC (Note 2) Symbol Analog VA Logic VL Digital VD (Note (Note 4) V GND-0.7 IN (Note 4) V IND stg CS5340 Typ Max Unit (Note 1) 5.25 V 3.3 5.25 V 3.3 5. ° °C Min Max Units -0.3 +6.0 V -0.3 +6.0 V -0.3 +6.0 V +10 -10 mA VA+0.7 V -0.7 VL+0.7 V °C -50 +95 ° ...

Page 5

... Symbol Min Typ A-weighted 95 101 unweighted (Note 5) THD -94 - -78 - - Min - - -5 - 0.53*VA - CS5340 VA = 3.3 V Max Min Typ Max Unit - -88 - - Max Min Typ Max Unit - ...

Page 6

... Symbol Min Typ A-weighted 93 101 unweighted (Note 5) THD -94 - -78 - - Min - - -10 - 0.50*VA - CS5340 VA = 3.3 V Max Min Typ Max Unit - -86 - - Max Min Typ Max Unit - ...

Page 7

... Filter characteristics scale precisely with Fs 8. Response shown is for Fs equal to 48 kHz. Filter characteristics scale with Fs. DS601F2 Confidential Draft 3/11/08 Symbol (Note 7) (Note (Note 7) (Note (Note 7) (Note (Note 8) (Note 8) CS5340 Min Typ Max Unit 0 - 0.4895 Fs -0.035 - 0.035 dB 0.5687 - - ...

Page 8

... Figure 2. Single-Speed Mode Stopband Rejection 0.10 0.08 0.06 0.04 0.02 0.00 -0.02 -0.04 -0.06 -0.08 -0.10 0 0.52 0.53 0.54 0.55 Figure 4. Single-Speed Mode Passband Ripple 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 0.6 0.7 0.8 0.9 1.0 0.40 0.42 0.44 Figure 6. Double-Speed Mode Stopband Rejection CS5340 0.46 0.48 0.50 0.52 0.54 0.56 0.58 Frequency (norm alized to Fs) 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 Frequency (norm alized to Fs) 0.46 0.48 0.50 0.52 0.54 0.56 0.58 Frequency (norm alized to Fs) DS601F2 0.60 0.5 0.60 ...

Page 9

... DS601F2 Confidential Draft 3/11/08 0.10 0.08 0.06 0.04 0.02 0.00 -0.02 -0.04 -0.06 -0.08 -0.10 0.50 0.51 0.52 0.00 0.05 Figure 8. Double-Speed Mode Passband Ripple 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 0.6 0.7 0.8 0.9 1.0 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.65 0.70 0.75 0.80 0.85 Figure 10. Quad-Speed Mode Stopband Rejection 0.10 0.08 0.06 0.04 0.02 0.00 -0.02 -0.04 -0.06 -0.08 0.35 0.40 0.45 0.50 -0.10 0.00 0.03 0.05 0.08 0.10 0.13 0.15 0.18 0.20 0.23 0.25 0.28 Figure 12. Quad-Speed Mode Passband Ripple CS5340 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 Frequency (norm alized to Fs) Frequency (norm alized to Fs) Frequency (norm alized to Fs) 9 ...

Page 10

... 3 VL, VL, VL,VD VL, VD VL (Power-Down Mode) PSRR (Note 10) 14. Symbol (% CS5340 Min Typ Max Unit 3.1 - 5.25 V 3.1 - 5.25 V 1 18 ...

Page 11

... Table on page CS5340 Typ Max Unit - 1953 ...

Page 12

... Figure 15. Master Mode, I²S SAI 12 Confidential Draft 3/11/08 LRCK input SCLK input MSB MSB-1 SDOUT Figure 14. Slave Mode, Left-Justified SAI LRCK input SCLK input t sdo MSB SDOUT CS5340 t sclkw t slrd t stp t hld MSB MSB-1 t sclkw t slrd t stp t hld Figure 16. Slave Mode, I²S SAI DS601F2 MSB ...

Page 13

... Positive Voltage Reference (Output) - Positive reference voltage for the internal FILT+ 15 sampling circuits. DS601F2 Confidential Draft 3/11/ MCLK FILT REF_GND SDOUT GND AINR SCLK AINL LRCK RST CS5340 13 ...

Page 14

... FILT+ REFGND VQ RST M0 M1 CS5340 A/D CONVERTER AINL SDOUT AINR MCLK LRCK SCLK GND CS5340 1 µ F Power Down and Mode Settings VL or GND * Ω 10k Audio Data Processor Timing Logic and Clock 2 * Pull- for I S *** Capacitor value affects ...

Page 15

... APPLICATIONS 4.1 Single-, Double-, and Quad-Speed Modes The CS5340 can support output sample rates from 2 kHz to 200 kHz. The proper speed mode can be de- termined by the desired output sample rate and the external MCLK/LRCK ratio, as shown in Speed Mode Single-Speed Mode Double-Speed Mode Quad-Speed Mode * Quad-Speed Mode, 64x only available in Master Mode ...

Page 16

... Fs to maximize system performance. A unique feature of the CS5340 is the automatic selection of either Single-, Double- or Quad-Speed mode when operating as a clock slave. The auto-mode select feature negates the need to configure the Mode pins to correspond to the desired mode ...

Page 17

... Master Clock The CS5340 requires a Master clock (MCLK) which runs the internal sampling circuits and digital filters. There is also an internal MCLK divider which is automatically activated based on the speed mode and frequency of the MCLK. Table 4 lists some common audio output sample rates and the required MCLK frequency. Please note that not all of the listed sample rates are supported when operating with a fast MCLK (512x, 256x, 128x for Single-, Double-, and Quad-Speed Modes, respectively) ...

Page 18

... LRCK signals are the same for all of the CS5340’s in the system. If only one master clock source is needed, one solution is to place one CS5340 in Master mode, and slave all of the other CS5340’s to the one master. If multiple master clock sources are needed, a possible solution would be to supply all clocks from the same external source and time the CS5340 reset with the inactive (falling) edge of MCLK ...

Page 19

... Capacitor Size on the Reference Pin (FILT+) The CS5340 requires an external capacitance on the internal reference voltage pin, FILT+. The size of this decoupling capacitor will affect the low frequency distortion performance as shown in capacitor values used to optimize low frequency distortion performance. This plot was taken using the CDB5340 evaluation platform, with the device running in Single-Speed Mode and VA=VD=VL=5 V ...

Page 20

... The deviation from the nominal full-scale analog input for a full-scale digital output. Gain Drift The change in gain value with temperature. Units in ppm/°C. Offset Error The deviation of the mid-scale transition (111...111 to 000...000) from the ideal. Units in mV. 20 Confidential Draft 3/11/08 CS5340 DS601F2 ...

Page 21

... SEATING PLANE SIDE VIEW MAX MIN -- 0.043 -- 0.006 0.05 0.037 0.85 0.012 0.19 0.201 4.90 0.256 6.30 0.177 4. 0.028 0.50 4° 8° 0° JEDEC #: MO-153 Controlling Dimension is Millimeters Symbol θ CS5340 1 E1 END VIEW L MILLIMETERS NOM MAX -- 1.10 -- 0.15 0.90 0.95 0.245 0.30 5.00 5.10 6.40 6.50 4.40 4.50 0.65 BSC -- 0.60 0.70 4° 8° Min Typ Max - - 135 - ...

Page 22

... Multi-Bit CS5340 Audio A/D Converter CDB5340 CS5340 Evaluation Board 8. REVISION HISTORY Release Remove CS5340-CZ from Ordering Information Redefine Serial Audio Port Switching Characteristics PP3 Correct dimension “e” under Package Dimensions Update Output Sample Rate Range Update maximum current and power specifications F1 ...

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