cs5322-blz Cirrus Logic, Inc., cs5322-blz Datasheet - Page 26

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cs5322-blz

Manufacturer Part Number
cs5322-blz
Description
24-bit, Variable-bandwidth A/d Converter Chipset
Manufacturer
Cirrus Logic, Inc.
Datasheet
2.17 Status Bits
The Status Register is a 16-bit register which al-
lows the user to read the flags and configuration
settings of the CS5322. Table 3 documents the data
bits of the Status Register.
The ERROR bit and ERROR pin value are the
OR’ed result of OVERWRITE, MFLG, ACC1, and
ACC2. The ERROR bit is active high whenever
any of the four error bits are set due to a fault con-
dition. The ERROR pin output is active low and
has a nominal 100 kΩ internal pull-up resistor.
The OVERWRITE bit is set when new conversion
data is ready to be loaded into the data register, but
the previous data was not completely read out. This
can occur on either of two conditions: a read oper-
ation is in progress or a read operation was started,
then aborted, and not completed. These two condi-
tions are data read attempts. The attempt is identi-
fied by the first SCLK low edge (MSB read) of a
data register read. If a data register read is not at-
26
Output Bit #
1 (MSB)
10
12
13
14
15
16
11
2
3
4
5
6
7
8
9
OVERWRITE Error
Table 3. Status Data (from the SOD Pin)
MFLG Error
ACC1 Error
ACC2 Error
Reserved
Function
ORCALD
ORCAL
USEOR
1SYNC
PWDN
DRDY
DECC
DECB
DECA
CSEL
Error
tempted, the CS5322 assumes that data is not want-
ed and does not assert OVERWRITE, and the old
data is over-written by the new data. On an OVER-
WRITE condition, the old partially read data is pre-
served, and the new data word is lost.
Status reads have no effect on OVERWRITE assert
operations. The OVERWRITE bit is cleared on a
status register read or RESET.
The MFLG error bit reflects the CS5321 MFLG
signal. Any high level on the CS5322 MFLG pin
will set the MFLG status bit. The bit is cleared on a
status register read or RESET operation, only if the
MFLG pin on the CS5322 has returned low. A in-
ternal nominal 100 kΩ pulldown resistor is on the
MFLG pin.
The accumulator error bits, ACC1 and ACC2, indi-
cate that an underflow or overflow has occurred in
the FIR1 filter for ACC1, or the FIR2 and FIR3 fil-
ters for ACC2. Both errors are cleared on a status
read, provided the error conditions are no longer
Detects one of the errors below
Bandwidth Selection Status
Bandwidth Selection Status
Bandwidth Selection Status
First sample after SYNC
Offset calibration done
Self-offset Calibration
Modulator Flag Error
Accumulator 1 Error
Use Offset Register
Accumulator Error
Factory use only
Overwrite Error
Channel Select
Standby mode
Description
Data Ready
CS5321/22
DS454F3

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