cs5351 Cirrus Logic, Inc., cs5351 Datasheet

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cs5351

Manufacturer Part Number
cs5351
Description
108 Db, 192 Khz Stereo A/d Converter
Manufacturer
Cirrus Logic, Inc.
Datasheet

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Part Number:
cs5351-DZZ
Manufacturer:
CIRRUSLOGIC
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4
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cs5351-DZZ
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
cs5351-KS
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CS
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Part Number:
cs5351-KSZ
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CIRRUS
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20 000
Part Number:
cs5351-KZ
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CIRRUSLOGIC
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1
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cs5351-KZ
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CIRRUSLOGIC
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Part Number:
cs5351-KZZ
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CIRRUS
Quantity:
20 000
Features
Advanced Multi-bit Delta-Sigma Architecture
24-bit Conversion
108 dB Dynamic Range
-98 dB THD+N
System Sampling Rates up to 192 kHz
135 mW Power Consumption
High-Pass Filter and DC Offset Calibration
Supports Logic Levels Between 5 and 2.5 V
Single-Ended Analog Inputs
Overflow Detection
Pin Compatible with the CS5361
http://www.cirrus.com
FILT+
AINR
AINL
108 dB, 192 kHz, Multi-bit Audio A/D Converter
VQ3
S/H
S/H
Voltage Reference
VQ1 VQ2
+
+
-
-
REFGND
LP Filter
LP Filter
DAC
DAC
Copyright © Cirrus Logic, Inc. 2007
OVFL
(All Rights Reserved)
ΔΣ
ΔΣ
V
L
Serial Output Interface
General Description
The CS5351 is a complete analog-to-digital converter
for digital audio systems. It performs sampling, analog-
to-digital conversion, and anti-alias filtering. The device
generates 24-bit values for both left and right inputs in
serial form at sample rates up to 192 kHz per channel.
The CS5351 uses a 5th-order, multi-bit, delta-sigma
modulator followed by digital filtering and decimation,
which removes the need for an external anti-alias filter.
The ADC uses a differential architecture which provides
excellent noise rejection.
The CS5351 is ideal for audio systems requiring wide
dynamic range, negligible distortion, and low noise.
Such applications include A/V receivers, DVD-R, CD-R,
digital mixing consoles, and effects processors.
ORDERING INFORMATION
CS5351-KSZ, Lead Free -10° to 70°C
CS5351-KZZ, Lead Free -10° to 70°C 24-pin TSSOP
CS5351-DZZ, Lead Free -40° to 85°C 24-pin TSSOP
CDB5351
SCLK
Decimation
Decimation
Digital
Digital
Filter
Filter
LRCK
SDOUT
High
Pass
Filter
High
Pass
Filter
MCLK
CS5351
Evaluation Board
M/S
RST
MODE0
HPF
MDIV
MODE1
I²S/LJ
24-pin SOIC
DS565F2
MAY '07

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cs5351 Summary of contents

Page 1

... The ADC uses a differential architecture which provides excellent noise rejection. The CS5351 is ideal for audio systems requiring wide dynamic range, negligible distortion, and low noise. Such applications include A/V receivers, DVD-R, CD-R, digital mixing consoles, and effects processors. ...

Page 2

... TABLE OF CONTENTS 1. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 4 SPECIFIED OPERATING CONDITIONS .............................................................................................. 4 ABSOLUTE MAXIMUM RATINGS ........................................................................................................ 4 ANALOG CHARACTERISTICS (CS5351-KSZ/KZZ) ............................................................................. 5 ANALOG CHARACTERISTICS (CS5351-DZZ) .................................................................................... 6 DIGITAL FILTER CHARACTERISTICS ................................................................................................. 7 DC ELECTRICAL CHARACTERISTICS .............................................................................................. 10 DIGITAL CHARACTERISTICS ............................................................................................................ 10 THERMAL CHARACTERISTICS ......................................................................................................... 10 SWITCHING CHARACTERISTICS - SERIAL AUDIO PORT .............................................................. 11 2. PIN DESCRIPTIONS ............................................................................................................................ 14 3. TYPICAL CONNECTION DIAGRAM ................................................................................................... 15 4. APPLICATIONS ................................................................................................................................... 16 4 ...

Page 3

... Figure 21. OVFL Output Timing, Left-Justified Format ............................................................................. 13 Figure 22. Typical Connection Diagram .................................................................................................... 15 Figure 23. CS5351 Master Mode Clocking ............................................................................................... 17 Figure 24. CS5351 Recommended Analog Input Buffer ........................................................................... 18 LIST OF TABLES Table 1. CS5351 Mode Control ................................................................................................................. 16 Table 2. CS5351 Slave Mode Clock Ratios .............................................................................................. 16 Table 3. CS5351 Common Master Clock Frequencies ............................................................................. 17 DS565F2 CS5351 3 ...

Page 4

... Symbol Positive Analog VA Positive Digital VD Positive Logic VL Commercial (-KSZ/-KZZ Automotive (-DZZ (Note 1) Symbol VA Analog VL Logic VD Digital I (Note (Note (Note 3) IND stg CS5351 Min Typ Max Unit 4.75 5.0 5.25 V 3.1 3.3 5.25 V 2.37 3.3 5. °C - °C Min Max Units -0.3 +6.0 V -0.3 +6.0 V -0.3 +6 ...

Page 5

... ANALOG CHARACTERISTICS (CS5351-KSZ/KZZ) (Test conditions (unless otherwise specified): Input test signal kHz sine wave; measurement bandwidth kHz.) Parameter Single-Speed Mode kHz Dynamic Range Total Harmonic Distortion + Noise Double-Speed Mode kHz Dynamic Range 40 kHz bandwidth unweighted Total Harmonic Distortion + Noise ...

Page 6

... ANALOG CHARACTERISTICS (CS5351-DZZ) (Test conditions (unless otherwise specified): Input test signal kHz sine wave; measurement bandwidth kHz.) Parameter Single-Speed Mode kHz Dynamic Range Total Harmonic Distortion + Noise Double-Speed Mode kHz Dynamic Range 40 kHz bandwidth unweighted Total Harmonic Distortion + Noise ...

Page 7

... CS5351 Max Unit 0.47 Fs 0.035 Deg 0.45 Fs 0.035 Deg 0.24 Fs 0.035 Deg - Deg ...

Page 8

... Figure 2. Single-Speed Mode Transition Band 0.10 0.08 0.05 0.03 0.00 -0.03 -0.05 -0.08 -0.10 0.00 0.05 0.52 0.53 0.54 0.55 Figure 4. Single-Speed Mode Passband Ripple 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 0.7 0.8 0.9 1.0 0.40 0.43 0.45 Figure 6. Double-Speed Mode Transition Band CS5351 0.44 0.46 0.48 0.50 0.52 0.54 0.56 0.58 Frequency (normalized to Fs) 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 Frequency (normalized to Fs) 0.48 0.50 0.53 0.55 0.58 0.60 0.63 0.65 0.68 Frequency (normalized to Fs) DS565F2 0.60 0.50 0.70 ...

Page 9

... Figure 11. Quad-Speed Mode Transition Band (Detail) DS565F2 0.10 0.08 0.05 0.03 0.00 -0.03 -0.05 -0.08 -0.10 0.50 0.53 0.55 0.00 0.05 Figure 8. Double-Speed Mode Passband Ripple Figure 10. Quad-Speed Mode Transition Band Figure 12. Quad-Speed Mode Passband Ripple CS5351 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 Frequency (normalized to Fs liz liz 0.50 9 ...

Page 10

... D VA, VD (Power-Down Mode) - (Note 8) PSRR Output Impedance Output Impedance Symbol (% ovfl Symbol Min θ JA-TM θ JA-SM θ JA-TS θ JA-SS CS5351 Typ Max - 17.5 21 27 100 - - 100 - - 198 243 - 135 161 - 2 0.01 - ...

Page 11

... Double-Speed Mode Fs Quad-Speed Mode Fs t 16/f setup t hold Fs = 48, 96, 192 kHz t clkw t mslr t sdo Fs t sclkw t dss t slrd Fs t sclkw t dss t slrd Fs t sclkw t dss t slrd CS5351 Min Typ Max 102 100 - 204 - - sclk 1 sclk - 740 - - 680 - 38 - 1953 - ...

Page 12

... LRCK input MSB-1 SDOUT Figure 14. Slave Mode, Left-Justified SAI SCLK input t sclkw LRCK input t dss MSB MSB-1 SDOUT Figure 16. Slave Mode, I²S SAI t setup Figure 17. OVFL Output Timing CS5351 t sclkw MSB MSB-1 MSB-2 t sclkw dss MSB MSB-1 t hold ...

Page 13

... Figure 18. Left-Justified Serial Audio Interface Figure 19. I²S Serial Audio Interface O VFL_L Figure 20. OVFL Output Timing, I²S Format CS5351 Right Channel Right Channel VFL_R ...

Page 14

... Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits. 14 RST 1 24 FILT+ M REFGND LRCK 3 22 VQ3 SCLK 4 21 AINR MCLK 5 20 VQ2 GND 7 18 GND VQ1 SDOUT 9 16 AINL MDIV 10 15 OVFL HPF I²S/ CS5351 DS565F2 ...

Page 15

... kΩ OVFL RST I 2 S/LJ Power Down M/S and Mode HPF Settings M0 M1 MDIV Audio Data Processor LRCK Timing Logic SCLK and Clock MCLK * Resistor may only be used derived from VA. If used, do not drive any other logic from VD CS5351 15 ...

Page 16

... APPLICATIONS 4.1 Operational Mode/Sample Rate Range Select The output sample rate, Fs, can be adjusted from 2 kHz to 204 kHz. The CS5351 must be set to the proper speed mode via the mode pins, M1 and M0. Refer to M1 (Pin 14) M0 (Pin 13 4.2 System Clocking The device supports operation in either Master Mode, where the left/right and serial clocks are synchronous- ly generated on-chip, or Slave Mode, which requires external generation of the left/right and serial clocks ...

Page 17

... Table 3. CS5351 Common Master Clock Frequencies 4.3 Power-Up Sequence Reliable power-up can be accomplished by keeping the device in reset until the power supplies, clocks and configuration pins are stable also recommended that reset be enabled if the analog or digital supplies drop below the minimum specified operating voltages to prevent power glitch related issues. ...

Page 18

... The operational amplifiers in the input circuitry driving the CS5351 may generate a small DC offset into the A/D converter. The CS5351 includes a high pass filter after the decimator to remove any DC offset which could result in recording a DC level, possibly yielding "clicks" when switching between devices in a multi- channel system ...

Page 19

... MCLK and LRCK must be the same for all of the CS5351’s in the system. If only one master clock source is needed, one solution is to place one CS5351 in Master Mode, and slave all of the other CS5351’s to the one master. If multiple master clock sources are needed, a possible solution would be to supply all clocks from the same external source and time the CS5351 reset with the inactive edge of MCLK ...

Page 20

... The deviation from the nominal full-scale analog output for a full-scale digital input. Gain Drift The change in gain value with temperature. Units in ppm/°C. Offset Error The deviation of the mid-scale transition (111...111 to 000...000) from the ideal. Units in mV. 20 CS5351 DS565F2 ...

Page 21

... PLANE e DIM ∝ DS565F2 E D INCHES MIN MAX MIN 0.093 0.104 2.35 0.004 0.012 0.10 0.013 0.020 0.33 0.009 0.013 0.23 0.598 0.614 15.20 0.291 0.299 7.40 0.040 0.060 1.02 0.394 0.419 10.00 0.016 0.050 0.40 0° 8° 0° CS5351 MILLIMETERS MAX 2.65 0.30 0.51 0.32 15.60 7.60 1.52 10.65 1.27 8° ∝ 21 ...

Page 22

... SEATING PLANE SIDE VIEW MAX MIN -- 0.043 -- 0.006 0.05 0.037 0.85 0.012 0.19 0.311 7.70 0.256 6.30 0.177 4. 0.028 0.50 4° 8° 0° JEDEC #: MO-153 Controlling Dimension is Millimeters. CS5351 1 E1 END VIEW L MILLIMETERS NOTE NOM MAX -- 1.10 -- 0.15 0.90 0.95 0.245 0.30 2,3 7.80 7.90 1 6.40 6.50 4.40 4.50 1 0.65 BSC -- 0.60 0.70 4° 8° DS565F2 ∝ ...

Page 23

... OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. DS565F2 Changes , under DC Electrical Characteristics. A www.cirrus.com. CS5351 23 ...

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