adsp-2196m Analog Devices, Inc., adsp-2196m Datasheet - Page 55

• Manufacturer Part Number: adsp-2196m
• Description: Dsp Microcomputer
• Manufacturer: Analog Devices, Inc.

Figure 33. Equivalent
Figure 35. Typical Output Rise Time (10%–90%,
Environmental Conditions
The thermal characteristics
in which the DSP is operating
influence performance.
Thermal Characteristics
The ADSP-2196 comes in a
144-lead LQFP or 144-lead
Ball Grid Array (mini-BGA)
package. The ADSP-2196 is
specified for an ambient tem-
perature (T
using the formula in
Figure
T
is not exceeded, a heatsink
and/or an air flow source may
REV. PrA
September 2001
AMB
data sheet specification
38. To ensure that the
Device Loading
for AC
Measurements
(Includes All
Fixtures)
V
DDEXT
AMB
) as calculated
This information applies to a product under development. Its characteristics and specifications are subject to change with-
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
=Max) vs. Load Capacitance
Figure 34.
Example System Hold
Time Calculation
To determine the data output
hold time in a particular
system, first calculate t
using the equation given in
Figure
the difference between the
ADSP-2196’s output voltage
and the input threshold for
the device requiring the hold
time. A typical –V will be
be used. A heatsink should be
attached to the ground plane
(as close as possible to the
thermal pathways) with a
thermal adhesive.
Where:
• T
• PD = Power dissipation in
For current information contact Analog Devices at 800/262-5643
ture (measured near top
surface of package)
W (this value depends
upon the specific applica-
tion; a method for
calculating PD is shown
under Power Dissipation).
AMB
Voltage Reference Levels for AC
31. Choose –V to be
= Ambient tempera-
Measurements
Enable/Disable)
Output
(Except
DECAY
0.4 V. C
capacitance (per data line),
and I
three-state current (per data
line). The hold time will be
t
disable time (i.e., t
the write cycle).
Capacitive Loading
Output delays and holds are
based on standard capacitive
loads: 50 pF on all pins (see
Figure
hold specifications given
should be derated by a factor
of 1.5 ns/50 pF for loads
other than the nominal value
of 50 pF.
Figure 36
•
•
There are some important
things to note about these
T
values in
• This represents thermal
• For the LQFP package:
DECAY
AMB
resistance at total power of
TBD W.
= 0.96°C/W
For the mini-BGA
package:
CA
JB
L
= TBD°C/W
calculations and the
= Value from
plus the minimum
is the total leakage or
37). The delay and
L
Table
Figure 35
is the total bus
show how output
JC
= 8.4°C/W
25:
DATRWH
Table
and
for
25.
JC
rise time varies with capaci-
tance. These figures also
show graphically how output
delays and holds vary with
load capacitance. (Note that
this graph or derating does
not apply to output disable
delays; see
Time on page
graphs in these figures may
not be linear outside the
ranges shown.
ADSP-2196
Output Disable
54.) The
55