adsp-bf548 Analog Devices, Inc., adsp-bf548 Datasheet - Page 25

• Manufacturer Part Number: adsp-bf548
• Description: Blackfin Embedded Processor
• Manufacturer: Analog Devices, Inc.

PIN DESCRIPTIONS
ADSP-BF54x Blackfin processors’ pin multiplexing scheme is
listed in
Table 11. Pin Multiplexing
Primary Pin
Function
(Number of
Pins)
Port A
GPIO (16 pins)
Port B
GPIO (15 pins)
Port C
GPIO (16 pins)
Port D
GPIO (16 pins)
Port E
GPIO (16 pins)
Port F
GPIO (16 pins)
Port G
GPIO (16 pins)
1, 2
Table 11
and the pin definitions are listed in
First Peripheral
Function
SPORT2 (8 pins)
SPORT3 (8 pins)
TWI1 (2 pins)
UART2 or 3 CTL (2 pins)
UART2 (2 pins)
UART3 (2 pins)
SPI2 SEL1-3 (3 pins)
SPI2 (3 pins)
SPORT0 (8 pins)
SDH (6 pins)
PPI1 D0–15 (16 pins)
SPI0 (7 pins)
UART0 TX (1 pin)
UART0 RX (1 pin)
UART0 or 1 CTL (2 pins)
PPI1 CLK,FS (3 pins)
TWI0 (2 pins)
PPI0 D0–15 (16 pins)
PPI0 CLK,FS (3 pins)
DATA 16–17 (2 pins)
SPI1 SEL1–3 (3 pins)
SPI1 (4 pins)
CAN0 (2 pins)
CAN1 (2 pins)
ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
Second Peripheral
Function
TMR4 (1 pin)
TMR5 (1 pin)
TMR6 (1 pin)
TMR7 (1 pin)
TMR0–2 (3 pins)
TMR3 (1 pin)
MXVR MMCLK, MBCLK
(2 pins)
Host D0–15 (16 pins)
Keypad
Row 4–6
Col 4–7 (7 pins)
Keypad R7 (1 pin)
ATAPI D0-15A
TMRCLK (1 pin)
ATAPI A0-2A
Host CTL (3 pins)
MXVR MTXON (1 pin)
Rev. A | Page 25 of 88 | October 2008
Table
12.
Third Peripheral
Function
TACI7 (1 shared pin)
TACLK7–0 (8 pins)
TACI2-3 (2 pins)
HWAIT (1 pin)
SPORT1 (8 pins)
PPI2 D0–7 (8 pins)
TACI0 (1 pin)
PPI2 CLK,FS (3 pins)
TACI4-5 (2 pins)
Fourth Peripheral
Function
PPI0 D18– 23 (6 pins)
Keypad
Row 0–3
Col 0–3 (8 pins)
CZM (1 pin)
Interrupt Capability
Interrupts (16 pins)
Interrupts (15 pins)
Interrupts (8 pins)
Interrupts (8 pins)
Interrupts (8 pins)
Interrupts (8 pins)
Interrupts (8 pins)
Interrupts (8 pins)
Interrupts (8 pins)
Interrupts (8 pins)
Interrupts (8 pins)
Interrupts (8 pins)
3