epf10k100bqc240-3 Altera Corporation, epf10k100bqc240-3 Datasheet - Page 16

Manufacturer Part Number

epf10k100bqc240-3

Description

Embedded Programmable Logic Device Family

Manufacturer

Altera Corporation

Datasheet

1.EPF10K100BQC240-3.pdf (128 pages)

FLEX 10K Embedded Programmable Logic Device Family Data Sheet

Figure 7

with the carry chain. One portion of the LUT generates the sum of two bits

using the input signals and the carry-in signal; the sum is routed to the

output of the LE. The register can either be bypassed for simple adders or

be used for an accumulator function. The carry chain logic generates the

carry-out signal, which is routed directly to the carry-in signal of the next-

higher-order bit. The final carry-out signal is routed to an LE, where it can

be used as a general-purpose signal.

Figure 7. Carry Chain Operation (n-bit Full Adder)

Carry-In

shows how an n-bit full adder can be implemented in n + 1 LEs

Carry Chain

LUT

LEn + 1

LEn

LE1

LE2

Altera Corporation

Carry-Out