ez80f915005modg ZiLOG Semiconductor, ez80f915005modg Datasheet - Page 21

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ez80f915005modg

Manufacturer Part Number
ez80f915005modg
Description
Ez80f91 Mini Enet Module
Manufacturer
ZiLOG Semiconductor
Datasheet
PS023603-0907
D
C
B
A
- T R S T N
V C C _ 3 3 V
G N D
C 2 2
5 M Hz
1 8 p F
R T C _ V D D
R 2 7
1 0 0 K
R 1 2
C 1 2
2 7 0 p F
Y 2
1 0 K
C 1 1
0 . 0 5 6 u F
C 2 3
1 8 p F
C 5 1
2 2 p F
3 2 . 7 6 8 K H z
R T C _ V D D
D[0:7]
Y 3
5
G N D
5
- F 9 1 _ W P
R 1 8
4 9 9
- W A I T
-RST
R 1 9
3 3
- N M I
T M S
T C K
TDI
- B U S R E Q
FILT_IN
XIN
V C C _ 3 3 V
- T R S T N
-RST
- F 9 1 _ W P
X O U T _O
C 5 2
2 2 p F
D 0
D 1
D 2
D 3
D 4
D 5
D 6
D 7
- W A I T
- N M I
TMS
T C K
TDI
C R S
C O L
R X E R
R X D V
R X D 3
R X D 2
R X D 1
R X D 0
R X C L K
TXCLK
M 1 1
H 1 1
H 1 2
H 1 0
C 1 0
E 1 1
B 1 2
G 1 2
L 1 0
J 1 0
J 1 1
J 1 2
M 3
M 4
M 7
M 1
M 2
M 8
K 3
H 5
H 7
K 9
K 6
A 2
D 8
A 7
D 6
A 4
C 4
D 5
B 4
E 6
C 5
C 6
A 5
B 8
C 1
E 2
G 2
H 9
K 4
K 7
G 7
B 5
C 2
C 8
D 9
E 3
F 9
G 3
G 6
H 4
H 6
K 8
L 2
J 4
L 3
L 4
L 6
J 6
L 9
J 2
J 7
L 8
e Z 8 0 F 9 1 _ B G A
U 6
D 0
D 1
D 2
D 3
D 4
D 5
D 6
D 7
W A I T
B U S R E Q
N M I
T M S
T C K
TDI
T R S T N
R E S E T
W P
M I I _ C R S
M I I _ C O L
M I I _ R X E R
M I I _ R X D V
M I I _ R X D 3
M I I _ R X D 2
M I I _ R X D 1
M I I _ R X D 0
M I I _ R X C L K
M I I _ T X C L K
FILT_IN
XIN
X O U T
P L L _ V D D
V D D
V D D
V D D
V D D
V D D
V D D
V D D
V D D
V D D
V D D
V D D
V D D
V D D
P L L _ V S S
V S S
V S S
V S S
V S S
V S S
V S S
V S S
V S S
V S S
V S S
V S S
V S S
V S S
V S S
V S S
V S S
R T C _ V D D
R T C _ X O U T
R T C _ X I N
Figure 6.eZ80F91 Mini Enet Module Schematic Diagram, #2 of 2—CPU and PHY
P A 5 _ P W M 1 _ T O U T 1
P A 4 _ P W M 0 _ T O U T 0
P D 1 _ R X D 0 _ I R R X D
P D 0 _ T X D 0 _ I R T X D
P A 6 _ P W M 2 _ E C 1
P A 3 _ P W M 3 _ O C 3
P A 2 _ P W M 2 _ O C 2
P A 1 _ P W M 1 _ O C 1
P A 0 _ P W M 0 _ O C 0
P B 0 _ I C 0 _ E C 0
P A 7 _ P W M 3
P C 6 _ D C D 1
P D 6 _ D C D 0
P B 7 _ M O S I
P B 6 _ M I S O
P C 5 _ D S R 1
P C 4 _ D T R 1
P C 3 _ C T S 1
P C 2 _ R T S 1
P C 1 _ R X D 1
P C 0 _ T X D 1
P D 5 _ D S R 0
P D 4 _ D T R 0
P D 3 _ C T S 0
P D 2 _ R T S 0
H A L T _ S L P
P B 5 _ I C B 3
P B 4 _ I C A 2
M I I _ T X D 3
M I I _ T X D 2
M I I _ T X D 1
M I I _ T X D 0
M I I _ T X E N
M I I _ T X E R
M I I _ M D I O
P B 3 _ S C K
T R I G O U T
M I I _ M D C
B U S A C K
P B 1 _ I C 1
P C 7 _ R I 1
P D 7 _ R I 0
P B 2 _ S S
I N S T R D
I O R Q
M R Q
S D A
T D O
C S 0
C S 1
C S 2
C S 3
S C L
A 1 0
A 1 1
A 1 2
A 1 3
A 1 4
A 1 5
A 1 6
A 1 7
A 1 8
A 1 9
A 2 0
A 2 1
A 2 2
A 2 3
W R
P H I
R D
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
A 8
A 9
4
4
A 1
B 1
B 2
C 3
D 4
E 5
D 2
D 1
D 3
F 6
E 1
E 4
F 1
F 2
F 3
F 4
G 1
F 5
H 1
H 2
G 4
H 3
J 1
G 5
B 7
C 7
D 7
A 6
B 6
E 7
A 3
B 3
M 5
L 5
K 5
J 5
L 7
J 3
K 1
K 2
L 1
A 1 1
A 1 2
A 8
F 7
C 9
A 9
B 9
E 8
B 1 0
A 1 0
C 1 1
C 1 2
D 1 0
E 9
D 1 1
F 8
D 1 2
E 1 0
E 1 2
G 8
F 1 0
F 1 1
F 1 2
G 9
G 1 0
G 1 1
H 8
K 1 1
K 1 2
J 9
K 1 0
L 1 1
L 1 2
M 1 2
M 9
B 1 1
M 6
M 1 0
J 8
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
A 8
A 9
A 1 0
A 1 1
A 1 2
A 1 3
A 1 4
A 1 5
A 1 6
A 1 7
A 1 8
A 1 9
A 2 0
A 2 1
A 2 2
A 2 3
P A 7
P A 6
P A 5
P A 4
P A 3
P A 2
P A 1
P A 0
P B 7
P B 6
P B 5
P B 4
P B 3
P B 2
P B 1
P B 0
P C 7
P C 6
P C 5
P C 4
P C 3
P C 2
P C 1
P C 0
P D 7
P D 6
P D 5
P D 4
P D 3
P D 2
P D 1
P D 0
- C S 0
TXD3
TXD2
TXD1
TXD0
TXEN
TXER
M D C
M D I 0
- R D
- W R
- C S 1
- C S 2
- C S 3
S C L
S D A
- R D
- W R
IICSCL
I I C S D A
A[0:23]
PA[0:7]
PB[0:7]
PC[0:7]
PD[0:7]
- H A L T _ S L P
e Z 8 0 C L K
T D O
T R I G O U T
-CS[0:3]
PRELIMINARY
V C C _ 3 3 V
C 1 3
0.1uF
R 2 6 4.7K
C 2 5
0 . 0 0 1 u F
C 3 8
0.1uF
V C C _ 3 3 V
V D D C
G N D
C 1 4
0.1uF
G N D
3
3
V D D C
C 2 6
0 . 0 0 1 u F
C 3 9
0.1uF
V C C _ 3 3 V
M D I 0
M D C
R X D 3
R X D 2
R X D 1
R X D 0
V C C _ 3 3 V
R X D V
R X C L K
R X E R
TXER
TXCLK
TXEN
TXD0
TXD1
TXD2
TXD3
C O L
C R S
V C C _ 3 3 V
G N D
C 1 5
0.1uF
G N D
G N D
G N D
C 2 7
0 . 0 0 1 u F
C 4 0
0.1uF
V C C _ 3 3 V
G N D
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
1
2
3
4
5
6
7
8
9
M D I O
M D C
R X D 3 / P H Y A D 1
R X D 2 / P H Y A D 2
R X D 1 / P H Y A D 3
R X D 0 / P H Y A D 4
V C C
G N D
R X D V / P C S _ L P B K
R X C
R X E R / I S O
G N D
V D D C
T X E R
T X C / R E F C L K
T X E N
T X D 0
T X D 1
T X D 2
T X D 3
C O L / R M I I
C R S / R M I I _ B T B
G N D
V C C
U 5
C 1 6
0.1uF
C 2 8
0 . 0 0 1 u F
C 4 1
0.1uF
+
C 1 9
4 7 u F
K S 8 7 2 1 B L
C 2 9
0 . 0 0 1 u F
L E D 1 / S P D 1 0 0 / n o F E F
L E D 3 / N W A Y E N
L E D 2 / D U P L E X
I N T / P H Y A D D 0
CPU & PHY
F X S D / F X E N
L E D 0 / T E S T
V D D R C V
V D D P L L
C 3 0
0 . 0 0 1 u F
V D D T X
V D D R X
R E X T
G N D
G N D
G N D
G N D
G N D
R S T
R X +
TX+
TX-
RX-
X O
P D
XI
V C C _ 3 3 V
4 8
4 7
4 6
4 5
4 4
4 3
4 2
4 1
4 0
3 9
3 8
3 7
3 6
3 5
3 4
3 3
3 2
3 1
3 0
2 9
2 8
2 7
2 6
2 5
C 1 7
0.1uF
2
G N D
2
V C C _ 3 3 V
R 2 3
2 2 0
C 3 1
0 . 0 0 1 u F
G N D
V D D _ P L L
G N D
- S P E E D
- L E D L N K
-RST
G N D
RX+
RX-
TX+
TX-
G N D
G N D
R 2 4
2 2 0
C 1 8
0 . 0 0 1 u F
C 3 2
0 . 0 0 1 u F
INT
V C C _ 3 3 V
R 1 3
Header 1
J P 2
R 2 0 49.9
R 2 1 49.9
ZiLOG, Inc.
532 Race Street. San Jose,CA 95126. 408.558.8500
Title
Size
Date:
B
0.1uF
+
6 . 8 1 K 1 %
C 7
G N D
C 2 0
4 7 u F
C 3 3
0 . 0 0 1 u F
R 2 2
R 2 5
eZ80F91 Ethernet Mini Module.
D o c u m e n t N u m b e r
Wednesday, April 07, 2004
Make sure that power connections
and nets VDD_PLL and VDDC have
the shortest route possible
+
C 8
1 0 u F
49.9
49.9
1
Ferrite Bead
TX+
TX-
RX+
RX-
F B 1
G N D
Y 1
2 5 M H z
C 5
C 2 4
0.1uF
- L E D L N K
- S P E E D
96C0942-001
Product Specification
C 6
R 1 6
2
2 2 p F
2 2 p F
0.1uF
R 1 5 1 K
C 9
V C C _ 3 3 V
1 K
S h e e t
1
G N D
1
+
C 1 0
1 0 u F
V C C _ 3 3 V
1 0
1 1
1 2
1
1
4
2
3
5
6
8
9
2
F B 2
Ferrite Bead
H F J 1 1 - 2 4 5 0 E
P 1
TX+
T X C T
TX-
R X +
R X C T
RX-
G N D
A N 1
C T 1
A N 2
C T 2
V C C _ 3 3 V
C 2 1
0.1uF
of
Schematics
V D D C
2
2
R e v
B
D
C
B
A
17

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