ade7762 Analog Devices, Inc., ade7762 Datasheet

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ade7762

Manufacturer Part Number
ade7762
Description
Polyphase Energy Metering Ic With Phase Drop Indication
Manufacturer
Analog Devices, Inc.
Datasheet

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FEATURES
High accuracy supports 50 Hz/60 Hz IEC 62053-21
Less than 0.1% error over a dynamic range of 500 to 1
Compatible with 3-phase, 3-wire delta and 3-phase, 4-wire
Supplies average active power on the frequency outputs F1
High frequency output (CF) is intended for calibration and
Logic output REVP indicates a potential miswiring or
Dropout indication for each phase on LED driver pins
Phase sequence error detection
Direct drive for electromechanical counters and 2-phase
Proprietary ADCs and DSP provide high accuracy over large
On-chip power supply monitoring
On-chip creep protection (no load threshold)
On-chip reference 2.4 V ± 8% (25 ppm/°C typical) with
Single 5 V supply, low power (42.5 mW typical)
Low cost CMOS process
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Wye configurations
and F2
supplies instantaneous active power
negative power on the sum of all phases
stepper motors (F1 and F2)
variations in environmental conditions and over time
external overdrive capability
Polyphase Energy Metering IC
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
GENERAL DESCRIPTION
The ADE7762
measurement IC. The ADE7762 specifications surpass the
accuracy requirements as quoted in the IEC62053-21 standard.
The only analog circuitry used in the ADE7762 is in the
analog-to-digital converters (ADCs) and reference circuit. All
other signal processing (for example, multiplication, filtering,
and summation) is carried out in the digital domain. This
approach provides superior stability and accuracy over
extremes in environmental conditions and over time.
The ADE7762 supplies average active power information on
the low frequency outputs, F1 and F2. These logic outputs can
be used to directly drive an electromechanical counter or to
interface with a microcontroller (MCU). The CF logic output
gives instantaneous active power information. This output is
intended to be used for calibration purposes.
The ADE7762 includes a power supply monitoring circuit on the
V
on V
resets and no pulses are issued on F1, F2, and CF.
A multiple multiplexed logic output provides phase dropout per
phase, reverse polarity per phase, and a phase sequence error.
Internal phase matching circuitry ensures that the voltage and
current channels are phase matched. An internal no load
threshold ensures that the ADE7762 does not exhibit any creep
when there is no load.
The ADE7762 is available in a 28-lead SOIC package.
1
U.S. Patents pending.
DD
pin. The ADE7762 remains inactive until the supply voltage
DD
with Phase Drop Indication
reaches 4 V. If the supply falls below 4 V, the ADE7762
1
is a high accuracy polyphase electrical energy
©2007 Analog Devices, Inc. All rights reserved.
ADE7762
www.analog.com

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ade7762 Summary of contents

Page 1

... V pin. The ADE7762 remains inactive until the supply voltage reaches the supply falls below 4 V, the ADE7762 DD resets and no pulses are issued on F1, F2, and CF. A multiple multiplexed logic output provides phase dropout per phase, reverse polarity per phase, and a phase sequence error. ...

Page 2

... ADE7762 TABLE OF CONTENTS Features .............................................................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Functional Block Diagram .............................................................. 3 Specifications..................................................................................... 4 Timing Characteristics ................................................................ 5 Absolute Maximum Ratings............................................................ 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Typical Performance Characteristics ............................................. 9 Test Circuit ...................................................................................... 10 Terminology .................................................................................... 11 Theory of Operation ...................................................................... 12 Power Factor Considerations.................................................... 12 Nonsinusoidal Voltage and Current ........................................ 13 Analog Inputs.................................................................................. 14 Current Channels ...

Page 3

... PHASE AND REVP MONITOR LED_CTRL LED_A LED_B LED_C REVP IN/OUT Figure 1. Rev Page ABS POWER X LPF SUPPLY MONITOR ADE7762 X DGND 4 21 CLKIN CLKOUT 22 X DIGITAL-TO-FREQUENCY CONVERTER SCF ADE7762 ...

Page 4

... ADE7762 SPECIFICATIONS ± 5%, AGND = DGND = 0 V, on-chip reference, CLKIN = 10 MHz Table 1. Parameter 1, 2 ACCURACY Measurement Error on Current Channel Phase Error Between Channels PF = 0.8 Capacitive PF = 0.5 Capacitive AC Power Supply Rejection Output Frequency Variation (CF) DC Power Supply Rejection Output Frequency Variation (CF) ANALOG INPUTS ...

Page 5

... Figure 3. Timing Diagram for LED Drivers Rev Page Min Typ Max 4.75 5.25 8 −40°C to +85°C, unless otherwise noted. MIN MAX Value 120 See Figure 2 ½ See Table 7 4/CLKIN 28.8 57.5 7.2 ADE7762 Unit V mA Unit ms sec sec ms sec sec μs μs μs ...

Page 6

... ADE7762 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter V to AGND DGND DD Analog Input Voltage to AGND VAP, VBP, VCP, VN, IAP, IAN, IBP, IBN, ICP, and ICN Reference Input Voltage to AGND Digital Input Voltage to DGND Digital Output Voltage to DGND ...

Page 7

... V Power Supply. This pin provides the supply voltage for the digital circuitry in the ADE7762. The supply DD voltage should be maintained ± 5% for a specified operation. This pin should be decoupled to DGND with a 10 μF capacitor in parallel with a 100 nF ceramic capacitor. ...

Page 8

... CLKOUT A crystal can be connected across this pin and CLKIN as described for Pin 21 to provide a clock source for the ADE7762. The CLKOUT pin can drive one CMOS load when an external clock is supplied at CLKIN or when a crystal is used. 23, 24 S0, S1 These logic inputs are used to select one of four possible frequencies for the digital-to-frequency conversion for design flexibility ...

Page 9

... POWER FACTOR = 0 LINE FREQUENCY (Hz) Figure 9. Error As a Percent of Reading over Frequency with an Internal Reference (Wye Connection) 0.5 0.4 0.3 0.2 5V 4.75V 0.1 0 5.25V 0 CURRENT CHANNEL (% of Full Scale) Figure 10. Error As a Percent of Reading over Power Supply with Internal Reference (Wye Connection) ADE7762 100 65 100 ...

Page 10

... ADE7762 TEST CIRCUIT 1MΩ 220V 1kΩ 10µF 100nF LOAD ABS DD 1kΩ IAP 33nF ADE7762 Rb CF 1kΩ 3 IAN 8 33nF CLKOUT 22 IBP 9 SAME AS CLKIN 21 IAP, IAN 10 IBN S0 23 ICP SAME AS IAP, IAN SCF ICN REF ...

Page 11

... Gain Error The gain error of the ADE7762 is defined as the difference between the measured output frequency (minus the offset) and the ideal output frequency. The difference is expressed as a percentage of the ideal frequency. The ideal frequency is obtained from the ADE7762 transfer function (see the Transfer Function section) ...

Page 12

... MULTIPLIER VCP ADC VN The low frequency output of the ADE7762 is generated by accumulating the total active power information. This low frequency inherently means a long accumulation time between output pulses. The output frequency is therefore proportional to the average active power. This average active power information can, in turn, be accumulated (for example counter) to generate active energy information ...

Page 13

... A limiting α (3) n factor on harmonic measurement is the bandwidth. On the ADE7762, the bandwidth of the active power measurement is 14 kHz with a master clock frequency of 10 MHz. Rev Page ∞ ∑ ...

Page 14

... Voltage channels must be driven from a common-mode voltage, that is, the differential voltage signal on the input must be refer- enced to a common mode (usually AGND). The analog inputs of the ADE7762 can be driven with common-mode voltages with respect to AGND. However, best results are achieved using a common mode equal to AGND. ...

Page 15

... The first option uses a potential transformer (PT) to pro- vide complete isolation from the main voltage. In the second option, the ADE7762 is biased around the neutral wire, and a resistor divider is used to provide a voltage signal proportional to the line voltage. Adjusting the ratio of Ra, Rb, and convenient way of carrying out a gain calibration on the meter ...

Page 16

... Figure 18. 3-Phase, 3-Wire Meter Connection with ADE7762 Note that only two current inputs and two voltage inputs of the ADE7762 are used in this case. The active power calculated by the ADE7762 does not depend on the selected channels. Figure 19 shows the connections of the ADE7762 analog inputs with the power lines in a 3-phase, 4-wire Wye service ...

Page 17

... At power-up, DD when the supply is less than 4 V ± 2% and V (typical), the outputs of the ADE7762 are inactive and the data path is held in reset. Once VDD is greater than 4 V ±2% and VREF is greater than 1.9 V (typical), the chip is active and energy accumulation begins ...

Page 18

... PHASE SEQUENCE ERROR The ADE7762 detects the zero crossing of each phase. A phase sequence error occurs when the sequence A>B>C>A> … is violated phase sequence error occurs, the Phase Seq/Drop LEDs blink (see Figure 22) ...

Page 19

... CROSSINGS PHASE SEQ/DROP LEDS ARE BLINKING AT 1Hz. 80 0° +120° 20% FS VOLTAGE WAVEFORMS RISING EDGE ZERO CROSSINGS PHASE SEQ/DROP LED FOR PHASE B IS ON. Figure 22. Phase Sequence Detection Rev Page –120° ADE7762 ...

Page 20

... The HPF in the current channels has an associated phase response that is compensated for on-chip. Figure 24 and Figure 25 show the phase error between channels with the compensation network. The ADE7762 is phase compensated kHz as shown. This ensures correct active harmonic power calculation even at low power factors. ...

Page 21

... VC MULTIPLIER IC The average value of a sinusoidal signal is zero. Thus, the frequency generated by the ADE7762 is proportional to the average active power. Figure 26 shows the digital-to-frequency conversion for steady load conditions, that is, constant voltage and current. The frequency output CF varies over time, even under steady load conditions (see Figure 26). This frequency variation is primarily due to the cos(2ω ...

Page 22

... To remedy this, an appropriate integration time should be considered to achieve the desired accuracy. Mode Selection of the Sum of the Three Active Energies The ADE7762 can be configured to execute the arithmetic sum of the three active energies ΦA sum of the absolute value of these energies |Wh ...

Page 23

... The maximum frequency also depends on the number (12) of phases connected to the ADE7762 3-phase, 3-wire delta service, the maximum output frequency is different from the maxi- mum output frequency in a 3-phase, 4-wire Wye service. The ...

Page 24

... BN B ⎝ ⎠ ⎝ l ⎝ 3 where × sin(2π/ × sin(π/ the LPF on each channel eliminates the 2ω the equation, the active power measured by the ADE7762 × × + × × full-scale ac voltage of ± ...

Page 25

... As in the case of F1 and F2, if the period 190 ms, the CF pulse width is set to half the period. For exam- ple, if the CF frequency is 20 Hz, the CF pulse width is 25 ms. Rev Page ADE7762 frequency for a meter design, the (maximum load) with a 100 imp/kWh MAX ) ...

Page 26

... Current Phase A is 10% of full scale with this detection scheme detects that VA × below the no-load threshold but that VB × IA and VC × IA are not. Therefore, the ADE7762 does not detect a no-load threshold for V × I and lets this phase contribute to the total power ...

Page 27

... REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 27. 28-Lead Standard Small Outline Package [SOIC_W] Wide Body (RW-28) Dimensions shown in millimeters and (inches) Package Description 28-Lead Standard Small Outline Package [SOIC_W] 28-Lead [SOIC_W], 13” Reel ADE7762 Evaluation Board Rev Page 45° 8° 0° 1.27 (0.0500) 0.33 (0.0130) 0.40 (0.0157) ...

Page 28

... ADE7762 NOTES ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05757-0-8/07(0) Rev Page ...

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