z86e02sl1925 ZiLOG Semiconductor, z86e02sl1925 Datasheet - Page 29

• Manufacturer Part Number: z86e02sl1925
• Description: General-purpose Otp Mcu With 14 I/o Lines
• Manufacturer: ZiLOG Semiconductor

STANDARD Mode
PS014802-0903
Note:
Recommendations for dampening voltage surges in both test and OTP mode
include the following:
•
•
XTAL1, XTAL2. Crystal In, Crystal Out (time-based input and output, respec-
tively). These pins connect an external parallel-resonant crystal, resonator, RC,
LC, or an external single-phase clock (8 MHz max) to the on-chip clock oscillator
and buffer.
Port 0, P02–P00. Port 0 is a 3-bit bidirectional, Schmitt-triggered CMOS-compati-
ble I/O port. These three I/O lines can be globally configured under software con-
trol to be inputs or outputs (Figure 9).
Auto Latch. The Auto Latch places valid CMOS levels on all CMOS inputs
(except P33, P32, P31) that are not externally driven. A valid CMOS level, rather
than a floating node, reduces excessive supply current flow in the input buffer. On
Power-up and Reset, the Auto Latch sets the ports to an undetermined state of 0
or 1. The default condition is AUTO LATCH ENABLED. The Auto Latch can be
disabled by programming the AUTO LATCH DISABLE option bit.
Using a clamping diode to V
Adding a capacitor to the affected pin.
Programming the EPROM/Test Mode Disable option prevents
accidental entry into EPROM Mode or Test Mode.
CC
.
General-Purpose OTP MCU with 14 I/O Lines
Z86E02 SL 1925
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