mpc235 Megawin Technology, mpc235 Datasheet - Page 13

• Manufacturer Part Number: mpc235
• Description: Low-speed Usb Micro-controller
• Manufacturer: Megawin Technology

Watchdog Timer (WDT)
Bit3~Bit0: Contents of WDT
RSTS: WDT reset status, set by hardware when WDT overflows, clear by firmware or hardware reset
CLR: RSTS clear and WDT reset control bit, program can clear RSTS and reset WDT by writing “1” into this bit
The watchdog timer (WDT) is organized as a 4-bit counter designed to prevent the program from
unknown errors. If the WDT overflows, the WDT reset function will be performed. RSTS (Bit 7 of
WDT_ST) is set by hardware when the WDT overflows and is cleared by hardware reset or writing 1 to
bit 7 of WDT_CLR. The interval of WDT to cause reset is about 0.7s at 6MHz external oscillator.
Programming one into the bit 7 of WDT_CLR register can reset the contents of the WDT. In normal
operation, the application program must reset WDT before it overflows. A WDT overflow indicates that
operation is not under control and the chip will be reset. The organization of the watchdog timer is
shown as below
MEGAWIN
Address
00DEH
00DFH
WDT_CLR
WDT_ST
Name
Fosc/2^18
RSTS
Bit 7
CLR
Qw1 Qw2
MPC235 Technical Summary
R
Bit 6
-
-
WDT
R
Qw3
R
Bit 5
Qw4
R
-
-
Overflow signal
Bit 4
S
R
-
-
Q
Bit 3
Bit 3
-
System Reset
WDT_ST.7
Hardware reset
WDT_CLR.7 <- 8XH
Bit 2
Bit 2
-
Bit 1
Bit 1
-
Bit 0
Bit 0
-
R
√
-
13
W
√
-