adm6999ux Infineon Technologies Corporation, adm6999ux Datasheet - Page 13

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adm6999ux

Manufacturer Part Number
adm6999ux
Description
Adm6999u 9 Port 10/100 Mb/s Single Chip Ethernet Switch Controller
Manufacturer
Infineon Technologies Corporation
Datasheet

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Table 3
Pin or Ball
No.
63
61
60
59
55
54
51
50
62
66
Data Sheet
ADM6999U/UX 128 Pin Descriptions
Name
ETXD0
GFCEN
ETXD1
ETXD2
ETXD3
ETXD4
ETXD5
ETXD6
ETXD7
P7FX
ETXD8
ETXEN
PHYAS0
Pin
Type
I/O
I/O
O
I/O
I/O
I/O
I/O
Buffer
Type
8mA, PU EBus Transmit Data 0
8mA, PU Setting GFCEN:Global Flow Control Enable
8mA
8mA, PD Setting Port7 FX/TX Mode select
8mA, PD EBus Transmit Data 8
8mA, PD EBus Transmit Enable
8mA, PD Setting PHAY0: Chip physical address 0 for multiple
Function
Acts as GMII transmit data TXD0. Synchronous to the rising
edge of TXCLK. Internally Pull-up. User must add pull high
1K resister to 3.3V on 16 port application.
At power-on-reset, latched as Full Duplex Flow control
setting
0
1
EBus Transmit Data bit 7~
Synchronous to the rising edge of GTXCLK.
Internal pull down.
0
1
chip EEPROM access.
Internal pull down. Power on reset value PHYAS0
combines with PHYAS1(LEDDATA).
PHYAD Gigabit PHY Address
For two ADM6999U/UXs as 16port application :
Master: ADM6999U/UX will read 93C46/66 EEPROM first
Bank.(00
Slave0: ADM6999U/UX will read 93C66 EEPROM second
Bank.(40
User must assert one SK cycle when CS is at idle stage and
chip internal registers are being writing.
B
B
B
B
13
00
01
1x
, Disable flow-control
, Enable flow-control (default)
, Port7 as TX port
, Port7 as FX port
H
H
~27
~67
18
08
09
H
H
H
H
H
).
).
Slave0
Slave1( Not used)
Master
Input and Output Signals
Rev. 1.42, 2005-11-25
ADM6999U/UX
Data Sheet

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