s1r72801 Epson Electronics America, Inc., s1r72801 Datasheet - Page 51
s1r72801
Manufacturer Part Number
s1r72801
Description
Ieee1394 Controller S1r72801f00a
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1R72801.pdf
(113 pages)
- Current page: 51 of 113
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PHY Interrupt Status Register
Bit 7 Sub Action Gap Detected
Bit6 Arbitration Reset Gap Detected
Bit5 Reserved
Bit4 Reserved
Bit3 Reserved
Bit2 PHY/LINK Interface Interrupt Detected
Bit1 PHY Register Write Done
Bit0 PHY Register Read Done
Address Register Name
Address Register Name
0x07
0x06
The value of each bit of this register indicates the status of a corresponding interrupt source. If these bits become
“1” when the associated bit of the PHYIntEnb Register is “1”, this register asserts the interrupt signal to the CPU.
The CPU reads this register after receiving the interrupt signal to locate an interrupt source. By writing the read
value again, it clears these bits.
When a Transmit Action Gap is detected in the PHY status of the PHY/LINK interface, this bit becomes “1”.
When an Arbitration Reset Gap is detected in the PHY status of the PHY/LINK interface, this bit becomes “1”.
When a PHY_Interrupt is detected in the PHY status of the PHY/LINK interface, this bit becomes “1”.
This status indicates the PHY is put under one of the following.
1) In most instances, a loop is created in the cable topology.
2) Cable power is insufficient.
3) A bias change is detected.
When the write access of the PHY Register is complete, this bit becomes “1”.
When read data is stored in the PHYRdStat Register at the time of read access of the PHY Register, this bit
becomes “1”.
(Reserved)
PhyIntStat
7:
6:
5:
4:
3:
2:
1:
0:
7: SubGap
6: ArbGap
5:
4:
3:
2: Phy_int
1: PhyWrDone
0: PhyRdDone
Bit Symbol
Bit Symbol
R(W) 0: None
R(W) 0: None
R(W) 0: None
R(W) 0: None
R(W) 0: None
R/W
R/W
EPSON
0:
0:
0:
0:
0:
0:
0:
0:
0:
0:
0:
1: Sub Action Gap Detected
1: ArbtrationResetGapDetected
1:
1:
1:
1: PHY Interrupt Detected
1: PHY Register Write Done
1: PHY Register Read Done
Description
Description
1:
1:
1:
1:
1:
1:
1:
1:
H.Rst S.Rst B.Rst
H.Rst S.Rst B.Rst
S1R72801F00A
0x00 0x00
0x00 0x00
–
–
47
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