lan8710 Standard Microsystems Corp., lan8710 Datasheet - Page 51

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lan8710

Manufacturer Part Number
lan8710
Description
Mii/rmii 10/100 Ethernet Transceiver With Hp Auto-mdix And Flexpwr Technology In A Small Footprint
Manufacturer
Standard Microsystems Corp.
Datasheet

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MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR
Datasheet
SMSC LAN8710/LAN8710i
5.3.8.1
5.3.8.2
Ethernet
10/100
MAC
Ethernet
10/100
MAC
Near-end Loopback
Near-end loopback is a mode that sends the digital transmit data back out the receive data signals for
testing purposes as indicated by the blue arrows in
by setting bit register 0 bit 14 to logic one.
A large percentage of the digital circuitry is operational near-end loopback mode, because data is
routed through the PCS and PMA layers into the PMD sublayer before it is looped back. The COL
signal will be inactive in this mode, unless collision test (bit 0.7) is active. The transmitters are powered
down, regardless of the state of TXEN.
Far Loopback
This special test mode is only available when operating in RMII mode. When the the RXD2/RMIISEL
pin is configured for MII mode, the SMI can be used to override this setting as described in
Section
Far loopback is a special test mode for MDI (analog) loopback as indicated by the blue arrows in
Figure
data that is received from the link partner on the MDI is looped back out to the link partner. The digital
interface signals on the local MAC interface are isolated.
TXD
5.3. The far loopback mode is enabled by setting bit register 17 bit 9 to logic one. In this mode,
5.3.9.3.
RXD
TXD
X
X
RXD
Digital
Ethernet Transceiver
Figure 5.1 Near-end Loopback Block Diagram
Far-end system
Digital
Ethernet Transceiver
Figure 5.2 Far Loopback Block Diagram
SMSC
SMSC
®
Analog
Technology in a Small Footprint
DATASHEET
Analog
51
X
X
TX
RX
Figure
TX
RX
5.1.The near-end loopback mode is enabled
XFMR
XFMR
CAT-5
CAT-5
Revision 1.0 (04-15-09)
Partner
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