at89c51rc2-slsil ATMEL Corporation, at89c51rc2-slsil Datasheet - Page 70
at89c51rc2-slsil
Manufacturer Part Number
at89c51rc2-slsil
Description
8-bit Microcontroller With 16k/ 32k Bytes Flash
Manufacturer
ATMEL Corporation
Datasheet
1.AT89C51RC2-SLSIL.pdf
(127 pages)
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Functional Description
Operating Modes
70
AT89C51RB2/RC2
Figure 26 shows a detailed structure of the SPI Module.
Figure 26. SPI Module Block Diagram
The Serial Peripheral Interface can be configured in one of the two modes: Master
mode or Slave mode. The configuration and initialization of the SPI Module is made
through one register:
•
Once the SPI is configured, the data exchange is made using:
•
•
•
During an SPI transmission, data is simultaneously transmitted (shifted out serially) and
received (shifted in serially). A serial clock line (SCK) synchronizes shifting and sam-
pling on the two serial data lines (MOSI and MISO). A Slave Select line (SS) allows
individual selection of a Slave SPI device; Slave devices that are not selected do not
interfere with SPI bus activities.
When the Master device transmits data to the Slave device via the MOSI line, the Slave
device responds by sending data to the Master device via the MISO line. This implies
full-duplex transmission with both data out and data in synchronized with the same clock
(Figure 27).
SPI Interrupt Request
The Serial Peripheral Control register (SPCON)
SPCON
The Serial Peripheral STAtus register (SPSTA)
The Serial Peripheral DATa register (SPDAT)
Clock
Divider
FCLK PERIPH
SPR2
/128
/16
/32
/64
SPEN
/8
/4
Clock
Select
SSDIS
MSTR
SPIF
Receive Data Register
CPOL
7
Shift Register
WCOL
Internal Bus
6
SPI
Control
CPHA
5
4
3
SPR1
-
2
Clock
Logic
SPCON
1
SPDAT
MODF
0
SPR0
-
M
Pin
Control
Logic
S
-
-
SPSTA
4180E–8051–10/06
-
8-bit bus
1-bit signal
MOSI
MISO
SCK
SS
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