saf-xc2287-96fxxl Infineon Technologies Corporation, saf-xc2287-96fxxl Datasheet - Page 109

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saf-xc2287-96fxxl

Manufacturer Part Number
saf-xc2287-96fxxl
Description
16/32-bit Single-chip Microcontroller With 32-bit Performance
Manufacturer
Infineon Technologies Corporation
Datasheet
Table 30
Parameter
Output valid delay for:
RD, WR(L/H)
Output valid delay for:
BHE, ALE
Output valid delay for:
A23 … A16, A15 … A0 (on P0/P1)
Output valid delay for:
A15 … A0 (on P2/P10)
Output valid delay for:
CS
Output valid delay for:
D15 … D0 (write data, MUX-mode)
Output valid delay for:
D15 … D0 (write data, DEMUX-
mode)
Output hold time for:
RD, WR(L/H)
Output hold time for:
BHE, ALE
Output hold time for:
A23 … A16, A15 … A0 (on P2/P10)
Output hold time for:
CS
Output hold time for:
D15 … D0 (write data)
Input setup time for:
READY, D15 … D0 (read data)
Input hold time for:
READY, D15 … D0 (read data)
1) Read data are latched with the same internal clock edge that triggers the address change and the rising edge
Data Sheet
of RD. Address changes before the end of RD have no impact on (demultiplexed) read cycles. Read data can
change after the rising edge of RD.
External Bus Cycle Timing for Lower Voltage Range
(Operating Conditions apply)
1)
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
10
11
12
13
14
15
16
20
21
23
24
25
30
31
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
SR
SR
107
Min.
0
0
0
0
0
29
-6
XC2000 Family Derivatives
XC2287 / XC2286 / XC2285
Typ.
Limits
Electrical Parameters
Max.
20
20
22
22
20
21
21
10
10
10
10
10
Unit Note
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V2.1, 2008-08

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