adm2491e Analog Devices, Inc., adm2491e Datasheet - Page 14

• Manufacturer Part Number: adm2491e
• Description: High Speed, Esd-protected, Half-/full-duplex, Icoupler Isolated Rs-485 Transceiver
• Manufacturer: Analog Devices, Inc.

ADM2491E
APPLICATIONS INFORMATION
ISOLATED POWER SUPPLY CIRCUIT
The ADM2491E requires isolated power capable of 5 V at up to
approximately 75 mA (this current is dependant on the data
rate and termination resistors used) to be supplied between the
V
center-tapped transformer and LDO can be used to generate the
isolated 5 V supply, as shown in Figure 28. The center-tapped
transformer provides electrical isolation of the 5 V power
supply. The primary winding of the transformer is excited with
a pair of square waveforms that are 180° out of phase with each
other. A pair of Schottky diodes and a smoothing capacitor are
used to create a rectified signal from the secondary winding.
The
power supply to the bus-side circuitry (V
ADM2491E.
TRANSFORMER
DD2
DRIVER
ADP3330
V
and the GND
CC
V
CC
linear voltage regulator provides a regulated
V
Figure 28. Isolated Power Supply Circuit
V
GND
ADM2491E
DD1
CC
ISOLATION
BARRIER
2
1
78253
pins. A transformer driver circuit with a
V
GND
SD103C
SD103C
DD2
2
+
22µF
DD2
IN
SD
ERR
NR
) of the
ADP3330
GND
OUT
5V
+
10µF
Rev. 0 | Page 14 of 16
PCB LAYOUT
The ADM2491E isolated RS-485 transceiver requires no external
interface circuitry for the logic interfaces. Power supply bypass-
ing is required at the input and output supply pins (see Figure 29).
Bypass capacitors are conveniently connected between Pin 1
and Pin 2 for V
capacitor value should be between 0.01 μF and 0.1 μF. The total
lead length between both ends of the capacitor and the input
power supply pin should not exceed 20 mm. Bypassing between
Pin 1 and Pin 8 and between Pin 9 and Pin 16 should also be
considered unless the ground pair on each package side is
connected close to the package.
In applications involving high common-mode transients, care
should be taken to ensure that board coupling across the isola-
tion barrier is minimized. Furthermore, the board layout should
be designed such that any coupling that does occur equally affects
all pins on a given component side. Failure to ensure this could
cause voltage differentials between pins exceeding the absolute
maximum ratings of the device, thereby leading to latch-up or
permanent damage.
GND
GND
V
RxD
TxD
Figure 29. Recommended Printed Circuit Board Layout
DD1
RE
DE
NC
1
1
DD1
and between Pin 15 and Pin 16 for V
NC = NO CONNECT
ADM2491E
V
GND
A
B
Z
Y
NC
GND
DD2
2
2
DD2
. The