adm1051a Analog Devices, Inc., adm1051a Datasheet - Page 8

• Manufacturer Part Number: adm1051a
• Description: Precision Dual Voltage Regulator Controllers
• Manufacturer: Analog Devices, Inc.

ADM1051/ADM1051A
HICCUP MODE FAULT PROTECTION
Hiccup Mode Fault Protection is a simple method of protecting
the external power device without the added cost of external sense
resistors or a current sense pin on the ADM1051/ADM1051A. In
the event of a short-circuit condition at the output, the output
voltage will fall. When the output voltage of a channel falls
20% below the nominal voltage, this is sensed by the hiccup com-
parator and the channel will go into Hiccup Mode, where the
enable signal to the control amplifier is pulsed on and off
with a 1:40 duty cycle. As mentioned earlier, Hiccup Mode
does not operate on Channel 2 of the ADM1051A.
To prevent the device inadvertently going into Hiccup Mode dur-
ing power-up or during channel enabling, the Hiccup Mode is
held off for approximately 60 ms on both channels. By this time
the output voltage should have reached its correct value. In the
case of power-up, the hold-off period starts when V
the power-on reset threshold of 6 V–9 V. In the case of channel
enabling, the hold-off period starts when SHDN is taken high.
Note that the hold-off timeout applies to both channels even if
only one channel is disabled/enabled.
As the 3.3 V input to the drain of the MOSFET is not monitored,
it should ideally rise at the same or a faster rate than V
very least it must be available in time for V
value before the end of the power-on delay. If the output voltage
is still less than 80% of the correct value after the power-on delay,
the device will go into Hiccup Mode until the output voltage
exceeds 80% of the correct value during a Hiccup Mode on-
period. Of course, if there is a fault condition at the output
during power-up, the device will go into Hiccup Mode after the
power-up delay and remain there until the fault condition is
removed.
The effect of power-on delay is illustrated in Figure 4. This shows
an ADM1051/ADM1051A being powered up with a fault
condition. The output current rises to a very high value dur-
ing the power-on delay, then the device goes into Hiccup Mode
and the output is pulsed on and off at 1:40 duty cycle. When the
fault condition is removed, the output voltage recovers to its
normal value at the end of the Hiccup Mode off period.
The load current at which the ADM1051/ADM1051A will go
into Hiccup Mode is determined by three factors:
• the input voltage to the drain of the MOSFET, V
• the output voltage V
• the on-resistance of the MOSFET, R
It should be emphasized that the Hiccup Mode is not intended
as a precise current limit but as a simple method of protecting
the external MOSFET against catastrophic fault conditions such
as output short-circuits.
I
HICCUP
OUT
= (V
(–20%)
IN
– (0.8 × V
ON
OUT
OUT
))/R
to reach its final
ON
IN
CC
CC
reaches
. At the
APPLICATIONS INFORMATION
PCB LAYOUT
For optimum voltage regulation, the loads should be placed as
close as possible to the source of the output MOSFETs and
feedback to the sense inputs should be taken from a point as
close to the loads as possible. The PCB tracks from the loads
back to the sense inputs should be separate from the output
tracks and not carry any load current.
Similarly, the ground connection to the ADM1051/ADM1051A
should be made as close as possible to the ground of the loads, and
the ground track from the loads to the ADM1051/ADM1051A
should not carry load current. Good and bad layout practice is
illustrated in Figure 5.
3.3V
3.3V
V
V
IN
IN
FORCE 1
FORCE 2
SENSE 1
SENSE 2
FORCE 1
FORCE 2
SENSE 1
SENSE 2
GND
GND
V
V
12V
12V
IN GROUND LEAD
CC
CC
VOLTAGE DROP
I
1
I
2
LOAD 1
LOAD 1
I
1
V
I
V
1
OUT1
OUT1
LOAD 2
LOAD 2
I
2
V
V
I
OUT2
2
OUT2
GOOD
BAD
VOLTAGE DROP
BETWEEN OUTPUT
AND LOAD