st8004 STMicroelectronics, st8004 Datasheet - Page 15

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st8004

Manufacturer Part Number
st8004
Description
Smartcard Interface
Manufacturer
STMicroelectronics
Datasheet

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ST8004
6
6.1
6.2
6.3
Functional description
Throughout this document it is assumed that the reader is familiar with iso7816 norm
terminology
Power supply
The supply pins for the IC are V
interface signals with the microcontroller are referenced to V
voltage of the microcontroller is also at V
powering up or powering down. The sequencer is not activated until V
+V
automatic deactivation of the contacts is performed. To generate a 5 V ±5% V
the card, an integrated voltage doubler is incorporated. This step-up converter should be
separately supplied by V
V
currents, the 2x100 nF capacitors of the step-up converter should have an ESR of less than
100 mΩ , and be located as near as possible to the IC. The supply voltages V
may be applied to the IC in any time sequence. To get the correct deactivation of the card
V
between 7 and 9 V is available within the application, this voltage may be tied to pin V
thus blocking the step-up converter. In this case, V
between pins S1 and S2 may be omitted.
Voltage supervisor (for V
This block surveys the V
used internally for maintaining the IC in the inactive mode during powering up or powering
down of V
inactive whatever the levels on the command lines. This also lasts for the duration of t
V
attempt to start an activation sequence during this time. When V
deactivation sequence of the contacts is performed.
Voltage supervisor (for V
This block surveys the V
used internally for maintaining the IC in the inactive mode during powering up or powering
down of V
150µs), the IC will remain inactive whatever the levels on the command lines. The IC remain
inactive also for the duration of t
system controller should not attempt to start an activation sequence during this time. When
V
is performed.
I(RIPPLE)(P-P)
DDP
DD
DD
hys(th2)
has reached a level higher than V
falls below V
is allowed to turn-off only when V
or V
DD
DD
(see
(see
th3
specifications, V
+ V
th3
Figure 3.
Figure 6.
during time more than
hys(th3)
DD
DD
DDP
). As long as V
). If V
supply. A defined reset pulse of approximately 10 ms (t
supply. A defined reset pulse of approximately 10 ms (t
when V
and PGND (from 4.5 to 6.5 V). In order to satisfy the
DDP
DD
DD
w
after V
and GND. V
is less than V
should be from 4.75V to 5.25V. Due to large transient
THSEL
THSEL
THSEL
th2
DD
DD
DD
DD
+V
= GND. When V
is below the undervoltage threshold. If a voltage
. All card contacts remain inactive during
has reached a level higher than V
is less than V
hys(th2)
T
HFIL
= V
= GND)
DD
th3
DDP
, a deactivation sequence of the contacts
should be in the range of 2.7 to 6.5 V. All
.The system controller should not
DD
during a time, longer than
must be tied to V
or floating)
th2
DD
DD
+V
falls below V
; therefore be sure the supply
hys(th2)
DD
Functional description
falls below V
DD
, the IC will remain
DD
reaches V
th2
and the capacitor
DD
or V
th3
CC
T
and V
. The
th2
HFIL
supply to
th3
W
W
, a
th2
, an
) is
W
) is
(max
UP
DDP
after
15/26
,

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