cyv15g0404dxb Cypress Semiconductor Corporation., cyv15g0404dxb Datasheet - Page 27

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cyv15g0404dxb

Manufacturer Part Number
cyv15g0404dxb
Description
Independent Clock Quad Hotlink Ii Transceiver With Reclocker
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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CYV15G0404DXB DC Electrical Characteristics
AC Test Loads and Waveforms
Notes
Document #: 38-02097 Rev. *B
V
V
V
V
V
V
I
I
VI
I
I
15. The common mode range defines the allowable range of INPUT+ and INPUT- when INPUT+ = INPUT-. This marks the zero-crossing between the true and
16. Maximum ICC is measured with VCC = MAX, RFENx = 0,TA = 25°C, with all channels and Serial Line Drivers enabled, sending a continuous alternating 01
17. Typical ICC is measured under similar conditions except with VCC = 3.3V, TA = 25°C, RFENx = 0, with all channels enabled and one Serial Line Driver per
18. Cypress uses constant current (ATE) load configurations and forcing functions. This figure is for reference only.
19. The LVTTL switching threshold is 1.4V. All timing references are made relative to where the signal edges cross the threshold voltage.
IHE
ILE
CC
CC
Differential CML Serial Outputs: OUTA1±, OUTA2±, OUTB1±, OUTB2±, OUTC1±, OUTC2±, OUTD1±, OUTD2±
Differential Serial Line Receiver Inputs: INA1±, INA2±, INB1±, INB2±, INC1±, INC2±, IND1±, IND2±
Power Supply
Parameter
OHC
OLC
ODIF
DIFFs
IHE
ILE
COM
complement inputs as the signal switches between a logic-1 and a logic-0.
pattern, and outputs unloaded.
transmit channel sending a continuous alternating 01 pattern. The redundant outputs on each channel are powered down and the parallel outputs are unloaded.
[16, 17]
[16, 17]
GND
V
[13]
[15]
th
= 1.4V
≤ 1 ns
R1 = 590Ω
R2 = 435Ω
(Includes fixture and
probe capacitance)
C
Output HIGH Voltage
(V
Output LOW Voltage
(V
Output Differential Voltage
|(OUT+) − (OUT−)|
Input Differential Voltage |(IN+) − (IN−)|
Highest Input HIGH Voltage
Lowest Input LOW Voltage
Input HIGH Current
Input LOW Current
Common Mode input range
Max Power Supply Current
Typical Power Supply Current
L
(c) LVTTL Input Test Waveform
cc
CC
≤ 7 pF
(a) LVTTL Output Test Load
Referenced)
Referenced)
2.0V
0.8V
Description
3.0V
C
L
2.0V
0.8V
3.3V
R1
R2
[18]
V
[19]
th
≤ 1 ns
= 1.4V
100Ω differential load
150Ω differential load
100Ω differential load
150Ω differential load
100Ω differential load
150Ω differential load
V
V
((V
(V
MAX
REFCLKx =
125 MHz
REFCLKx =
IN
IN
CC
CC
= V
= V
– 0.5V) max.
V
V
– 2.0V) + 0.5)min,
Test Conditions
IHE
ILE
IHE
ILE
≤ 270 ps
(continued)
Min.
Max.
Commercial
Industrial
Commercial
Industrial
20%
(d) CML/LVPECL Input Test Waveform
(Includes fixture and
probe capacitance)
(b) CML Output Test Load
R
L
= 100Ω
80%
V
V
V
V
V
V
V
IHE
ILE
CC
CC
CC
CC
CC
+1.25
–700
Min.
Typ.
450
560
100
910
900
– 0.5
– 0.5
– 1.4
– 1.4
– 2.0
80%
R
CYV15G0404DXB
L
[18]
V
V
V
V
CC
CC
CC
CC
Max.
1000
1200
1350
Max.
1270
1320
1270
1320
20%
+3.1
V
900
≤ 270 ps
CC
– 0.2
– 0.2
– 0.7
– 0.7
Page 27 of 44
Unit
mV
mV
mV
mA
mA
mA
mA
μA
μA
V
V
V
V
V
V
V
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