sy88953l Micrel Semiconductor, sy88953l Datasheet - Page 6

• Manufacturer Part Number: sy88953l
• Description: Sy88953l 3.3v 10.7gbps Cml Limiting Post Amplifier W/ Ttl Sd And /sd
• Manufacturer: Micrel Semiconductor

Micrel, Inc.
from a single +3.3V power supply, over temperatures from
–40°C to +85°C. Signals with data rates up to 10.7Gbps
and as small as 5mVp-p can be amplified. Figure 1 shows
the allowed input voltage swing. The SY88953L generates
SD and /SD outputs. SD
amplitude detection. The SY88953L also includes an input
threshold adjustment to correct pulsewidth distortion
Input Amplifier/Buffer
input stage. The high-sensitivity of the input amplifier allows
signals as small as 5mVp-p to be detected and amplified.
The input amplifier allows input signals as large as 1800mVp-
p. Input signals are linearly amplified with a typically 28dB
differential voltage gain. Since it is a limiting amplifier, the
SY88953L outputs typically 800mV
waveforms for input signals that are greater than 32mVp-p.
Applications requiring the SY88953L to operate with high-
gain should have the upstream TIA placed as close as possible
to the SY88953L’s input pins to ensure the best performance
of the device.
Threshold Adjustment
an offset at either input using V
one of the inputs is required to be adjusted, depending on
the required direction of the pulse width adjustment. The
SY88953L implements current source based offset control
of the inputs. “Typical Operating Characteristics” shows the
offset applied to the input for a given V
feature is disabled by simply setting V
Output Buffer
50Ω lines. The output buffer requires appropriate termination
for proper operation. An external 50Ω resistor to V
each output pin provides this. Figure 3 shows a simplified
schematic of the output stage and includes an appropriate
termination method. Of course, driving a downstream device
that is internally terminated with 50Ω to V
need for external termination. As noted in the previous
section, the amplifier outputs typically 800mVp-p waveforms
across 25Ω total loads. The output buffer thus switches
typically 16mA tail-current.
M9999-081506
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DETAILED DESCRIPTION
The SY88953L high-speed limiting post amplifier operates
Figure 2 shows a simplified schematic of the SY88953L's
The SY88953L’s duty cycle can be controlled by forcing
The SY88953L’s CML output buffer is designed to drive
LVL
sets the sensitivity of the input
THP
or V
TH
PP
THN
to GND.
CC
TH
voltage-limited
. Typically, only
eliminates the
voltage. This
CC
for
6
Signal-Detect
and /SD) open-collector TTL outputs with internal 5kΩ pullup
resistors as shown in Figure 4. SD is used to determine that
the input amplitude is large enough to be considered a valid
input. SD asserts high if the input amplitude rises above the
threshold set by SD
the complementary output of SD. /SD asserts low if the input
amplitude rises above the threshold set by SD
deasserts high otherwise. /SD can be fed back to the enable
(/EN) input to maintain output stability under a loss of signal
condition. /EN deasserts the true output signal without
removing the input signals. Typically 6dB SD hysteresis is
provided to prevent chattering.
Signal-Detect Level Set
the threshold of the input amplitude detection. Connecting
an external resistor between V
at SD
external resistor creates a voltage divider between V
V
external voltage may be applied rather than using a resistor.
The smaller the external resistor, implying a smaller voltage
difference from SD
Hence, larger input amplitude is required to assert SD.
“Typical Operating Characteristics” shows the relationship
between the input amplitude detection sensitivity and the
SD
Hysteresis
hysteresis. By definition, a power ratio measured in dB is
10log(power ratio). Power is calculated as V
electrical signal. Hence the same ratio can be stated as
20log(voltage ratio). While in linear mode, the electrical
voltage input changes linearly with the optical power and
hence the ratios change linearly. Therefore, the optical
hysteresis in dB is half the electrical hysteresis in dB given
in the datasheet. The SY88953L provides typically 3dB SD
optical hysteresis. As the SY88953L is an electrical device,
this datasheet refers to hysteresis in electrical terms. With
6dB SD hysteresis, a voltage factor of two is required to
assert or deassert SD.
CC
The SY88953L generates chatter-free signal-detect (SD
A programmable signal-detect level set pin (SD
The SY88953L provides typically 6dB SD electrical
LVL
-1.3V as shown in Figure 5. If desired, an appropriate
LVL
voltage.
. This voltages ranges from V
LVL
LVL
to V
and deasserts low otherwise. /SD is
CC
, the smaller the SD sensitivity.
CC
and SD
CC
LVL
to V
sets the voltage
CC
2
IN
-1.3V. The
SY88953L
/R for an
LVL
LVL
CC
) sets
and
and