hsdl-3220 Avago Technologies, hsdl-3220 Datasheet - Page 13

• Manufacturer Part Number: hsdl-3220
• Description: Compliant Low Power 4.0 Mbit/s Infrared Transceiver - Agilent Hewlett-packard
• Manufacturer: Avago Technologies

13
Appendix B: PCB Layout Suggestion
The following PCB layout guide-
lines should be followed to obtain
a good PSRR and EM immunity
resulting in good electrical
performance. Things to note:
1. The ground plane should be
2. The shield trace is a wide, low
3. Vled can be connected to
continuous under the part, but
should not extend under the
shield trace.
inductance trace back to the
system ground. CX1, CX2,
CX3, and CX4 are optional
supply filter capacitors; they
may be left out if a clean
power supply is used.
either unfiltered or unregu-
lated power supply. If Vled
and Vcc share the same power
supply, CX3 need not be used
and the connections for CX1
and CX2 should be before the
current limiting resistor R1. In
a noisy environment, including
capacitor CX2 can enhance
supply rejection. CX1 is
generally a ceramic capacitor
of low inductance providing a
wide frequency response while
CX2 and CX3 are tantalum
capacitors of big volume and
fast frequency response. The
use of a tantalum capacitor is
more critical on the Vled line,
which carries a high current.
CX4 is an optional ceramic
capacitor, similar to CX1, for
the IOVcc line.
4. Preferably a multi-layered
The area underneath the module
at the second layer, and 3 cm in
all directions around the module
is defined as the critical ground
plane zone. The ground plane
should be maximized in this
Figure 16. PCB layout suggestion.
board should be used to
provide sufficient ground
plane. Use the layer under-
neath and near the transceiver
zone. Refer to application note
AN1114 or the Agilent IrDA Data
Link Design Guide for details.
The layout below is based on a
2-layer PCB.
module as Vcc, and sandwich
that layer between ground
connected board layers.
Refer to the diagram below for
an example of a 4 layer board.
TOP LAYER
CONNECT THE METAL SHIELD AND MODULE
GROUND PIN TO BOTTOM GROUND LAYER.
LAYER 2
CRITICAL GROUND PLANE ZONE. DO NOT
CONNECT DIRECTLY TO THE MODULE
GROUND PIN.
LAYER 3
KEEP DATA BUS AWAY FROM CRITICAL
GROUND PLANE ZONE.
BOTTOM LAYER (GND)