sx8724s Semtech Corporation, sx8724s Datasheet - Page 39

• Manufacturer Part Number: sx8724s
• Description: Zoomingadc For Sensing Data Acquisition
• Manufacturer: Semtech Corporation

Revision 1.0
© Semtech
9.3.1 SAMPLE SHIFT Mode
If the SampleShiftEn bit of RegACCfg0[0x52] is active, the MISO/READY pin is used to shift out ADC samples data.
These samples are clocked out at falling edge of SCLK, MSB first (see
As illustrated in
end of conversion.
When the DataReady bit is set to '0', this pin functions as MISO only. The COMBINED DATA READY mode is disabled.
9.3.2 COMBINED DATA READY Mode
This combined functionality allows for the same control as the SAMPLE SHIFT mode but with fewer pins. Samples
shifted out (MISO) are combined with ADC data ready signal (READY). The DataReadyEn bit in register
RegACCfg4[0x56] determines the function of this pin. As illustrated in
ADVANCED COMMUNICATIONS & SENSING
SCLK
SS
MOSI
MISO
READY
Figure 24. Data Retrieval with the SAMPLE SHIFT Mode (COMBINED DATA READY Mode Disabled)
Figure
ADC end of conversion, sample READY
25, five wires are necessary to connect the master in this mode if to be synchronized to the ADC
February 2011
D15
1
MASTER
D14
ADC sample MSB shifted out
2
D13
(RegACOutMsb)
3
READY1
READY2
D12
Figure 25. Example with two SX872xS slaves
4
SCLK
MOSI
MISO
SS1
SS2
D11
5
D10
6
D9
7
Page 39
D8
8
NOP
D7
9
D6
ADC sample LSB shifted out
10
ZoomingADC for sensing data acquisition
Figure 24
D5
11
(RegACOutLsb)
Figure
D4
12
SCLK
MOSI
MISO
SS
READY
SCLK
MOSI
MISO
SS
READY
D3
13
26, four wires are necessary to connect
below).
D2
14
SX872xS
SLAVE 1
SX872xS
SLAVE 2
D1
15
D0
16
SX8724S
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DATASHEET
D15
1