adt7420ucpz-rl7 Analog Devices, Inc., adt7420ucpz-rl7 Datasheet - Page 9

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adt7420ucpz-rl7

Manufacturer Part Number
adt7420ucpz-rl7
Description
Manufacturer
Analog Devices, Inc.
Datasheet
Preliminary Technical Data
CT and INT Operation in One-Shot Mode
See Figure 11 for more information on one-shot CT pin
operation for T
limits is exceeded. Note that in interrupt mode, a read from
any register resets the INT and CT pins.
For the INT pin in the comparator mode, if the temperature
drops below the T
T
configuration register, Register Address 0x03) resets the INT pin.
For the CT pin in the comparator mode, if the temperature
drops below the T
mode bits (Bit 5 = 0 and Bit 6 = 1of the configuration register,
Register Address 0x03) resets the CT pin (see Figure 11).
Note that when using one-shot mode, ensure that the refresh
rate is appropriate to the application being used.
SHUTDOWN
The ADT7420 can be placed in shutdown mode by writing 1
to Bit 5 and 1 to Bit 6 of the configuration register (Register
Address 0x03), in which case the entire IC is shut down and
no further conversions are initiated until the ADT7420 is
taken out of shutdown mode. The ADT7420 can be taken
HYST
value, a write to the one-shot bits (Bit 5 and Bit 6 of the
CRIT
HIGH
CRIT
overtemperature events when one of the
– T
– T
HYST
HYST
POLARITY = ACTIVE HIGH
POLARITY = ACTIVE LOW
*THERE IS A 240ms DELAY BETWEEN WRITING TO THE CONFIGURATION REGISTER TO START
value, a write to the operation
value or goes above the T
A STANDARD ONE-SHOT CONVERSION AND THE CT PIN GOING ACTIVE. THIS IS DUE TO THE
CONVERSION TIME. THE DELAY IS 60ms IN THE CASE OF A
CT PIN
CT PIN
149°C
148°C
147°C
146°C
145°C
144°C
143°C
142°C
141°C
140°C
TEMPERATURE
LOW
Figure 11. One-Shot CT Pin
BIT 5 AND BIT 6 OF
CONFIGURATION
+
Rev. PrB | Page 9 of 24
REGISTER.*
WRITE TO
BIT 5 AND BIT 6 OF
CONFIGURATION
out of shutdown mode by writing 0 to Bit 5 and 0 to Bit 6 in
the configuration register (Register Address 0x03). The
ADT7420 typically takes 1 ms (with a 0.1 μF decoupling
capacitor) to come out of shutdown mode. The conversion
result from the last conversion prior to shutdown can still be
read from the ADT7420 even when it is in shutdown mode.
When the part is taken out of shutdown mode, the internal
clock is started and a conversion is initiated.
FAULT QUEUE
Bit 0 and Bit 1 of the configuration register (Register Address
0x03) are used to set up a fault queue. The queue can facilitate up
to four fault events to prevent false tripping of the INT and CT pins
when the ADT7420 is used in a noisy temperature environment.
The number of faults set in the queue must occur consecutively
to set the INT and CT outputs. For example, if the number of
faults set in the queue is four, then four consecutive temperature
conversions must occur with each result exceeding a temperature
limit in any of the limit registers before the INT and CT pins are
activated. If two consecutive temperature conversions exceed a
temperature limit and the third conversion does not, the fault
count is reset back to zero.
REGISTER.*
WRITE TO
ONE-SHOT CONVERSION.
BIT 5 AND BIT 6 OF
CONFIGURATION
REGISTER.*
WRITE TO
T
T
CRIT
CRIT – T HYST
TIME
ADT7420

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