pi2eqx3431 Pericom Semiconductor Corporation, pi2eqx3431 Datasheet - Page 3

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pi2eqx3431

Manufacturer Part Number
pi2eqx3431
Description
3.2gbps 2-channel Sata2/sas/xaui Redriver
Manufacturer
Pericom Semiconductor Corporation
Datasheet
Maximum Ratings
(Above which useful life may be impaired. For user guide lines, not tested.)
AC/DC Electrical Characteristics
Notes
1.
2.
3. Using Compliance test at 1.5Gbps and 3Gbps. Also using OOB (OOB is formed by ALIGNp primitive or D24.3) test patterns at 1.5Gbps. The
P
P
t
CML Receiver Input
V
V
Z
Z
Equalization
J
J
Signal Detector Performance
V
T
PD
RS
RM
ACTIVE
Storage Temperature ........................................................ –65°C to +150°C
Supply Voltage to Ground Potential ................................... –0.5V to +2.5V
DC SIG Voltage .......................................................... –0.5V to V
Current Output ................................................................-25mA to +25mA
Power Dissipation Continous ......................................................... 500mW
Operating Temperature .............................................................. 0 to +70°C
STANDBY
RX-DC
RX-DIFF-DC
EN
RX-DIFFP-P
RX-CM-ACP
TH
K28.7 pattern is applied differentially at point A as shown in Figure 1.
Total jitter does not include the signal source jitter. Total jitter (TJ) = (14.1 × RJ + DJ) where RJ is random RMS jitter and DJ is maximum
deterministic jitter. Signal source is a K28.5 ± pattern (00 1111 1010 11 0000 0101) for the deterministic jitter test and K28.7 (0011111000) or
equivalent for random jitter test. Residual jitter is that which remains after equalizing media-induced losses of the environment of Figure 1 or
its equivalent. The deterministic jitter at point B must be from media-induced loss, and not from clock source modulation. JItter is measured at
0V at point C of Figure 1.
ALIGN primitive (K28.5+D10.2+D27.3 = 0011111010+0101010101+0010011100). The D24.3 = 00110011001100110011
Symbol
08-0094
Supply Power
Supply Power
Latency
Differential Input Peak-to-
peak Voltage
AC Peak Common Mode
Input Voltage
DC Input Impedance
DC Differential Input
Impedance
Residual Jitter
Random Jitter
Threshold
Enable/disable time
Parameter
(1,2)
(1,2)
(V
DD
CE = LVCMOS Low
CE = LVCMOS High
From input to output
Total Jitter
CE = 1
= 1.8 ±0.1V)
Conditions
3
CC
+0.5V
3.2 Gbps, 1-Port, SATA2 /SAS Re-Driver
Note:
Stresses greater than those listed under MAX I MUM RAT-
INGS may cause permanent damage to the de vice. This is
a stress rating only and func tion al op er a tion of the device
at these or any other conditions above those indicated in
the operational sections of this spec i fi ca tion is not implied.
Exposure to absolute max i mum rating con di tions for ex-
tended periods may affect re li abil i ty.
0.200
Min.
75
40
80
(3)
Typ.
100
1.0
1.5
50
200
Max.
150
120
0.1
0.3
0.3
60
16
PI2EQX3431
PS8960A
(3)
mVppd
psrms
Units
Ulp-p
Ohm
mV
W
ns
ns
V
04/30/08

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