MK1491 Integrated Circuit System, MK1491 Datasheet - Page 2

• Manufacturer Part Number: MK1491
• Description: Geodeclock Chip
• Manufacturer: Integrated Circuit System

14.3M(SEL AUDIO)
MDS 1491-06 F
Pin Assignment
Pin Descriptions
Key: I = Input, TI = tri-level input, O = Output, P = Power supply connection, (T)I/O = Input on power up, becomes an Output after 10ms.
Weak internal pull-up resistors are present on SEL24, EPCI#, FS, LE#, PCISTP#, and SLOW#. These pins should be tied to VDD or GND,
and not be left floating. Internal resistors on PEN, SEL AUDIO, and TS pull to a mid-level (M).
4, 7, 11, 17, 23
18, 20, 26
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126 • [phone]tel • www.icst.com
1, 9, 14
Pin #
14.3M(TS)
10
12
13
15
16
19
21
22
24
25
27
28
2
3
5
6
8
SLOW#
SEL24
14.3M
VDD
GND
GND
GND
VDD
VDD
XO
FS
XI
14.3M(SEL AUDIO) TI/O 14.318 MHz output and audio frequency select input per table above.
AC97 AUDIO(PEN) TI/O Audio clock output and PCIF Function Enable per table above.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PWRDWN#
24M/14.3M
PCI(EPCI#)
14.3M(TS)
PCISTP#
SLOW#
48(LE#)
Name
14.3M
SEL24
GND
VDD
VDD
PCI
PCI
PCI
XO
XI
FS
28
27
26
25
24
23
22
21
20
19
18
17
16
15
TI/O 14.318 MHz output. Input control for all clocks per table above.
Type Description
AC97 AUDIO(PEN)
PCI
VDD
PCI
PCI
GND
PCI(EPCI#)
48M(LE#)
VDD
24M/14.3M
VDD
GND
PCISTP#
PWRDWN#
I/O Fixed frequency clock output and low EMI (spread spectrum) enable input per table above.
I/O PCI Output clock that can be early. Input control for Early PCI per table above.
O
O
O
O
O
O
P
P
P
I
I
I
I
I
I
Connect to +3.3V. Must be same voltage on all pins.
Crystal connection. Connect to a 14.31818 MHz crystal or input clock.
Crystal connection. Connect to a 14.31818 MHz crystal, or leave unconnected for clock.
Connect to Ground.
14.318 MHz buffered reference clock output.
PCI normal or slow mode select input per table on page 4.
Frequency Select for PCI clocks per table above.
Fixed frequency select input per table above. Selects frequency on pin 19.
Power down control; defined in table on page 4.
PCI Stop power down control; defined in table on page 4.
Connect to +3.3V. Must be same voltage on all pins.
Fixed frequency clock output per table above.
PCI Output clock. PCI/PCIF control set by PEN per table above.
PCI Output clock. PCI/PCIF control set by PEN per table above.
PCI Output clock.
24M/14.3M Frequency
Select Table
PCIF Enable Control
AC97 Audio Frequency Select
PCIF continues to run in PCI STOP
mode. See table on page 4.
SEL24
SEL AUDIO
PEN
M
0
1
0
1
M
0
1
2
Pin 25
PCIF
14.31818 MHz
PCI
PCI
24M/14.3M
24.0 MHz
AC97 AUDIO
CS5530 Geode
16.9344 MHz
24.576 MHz
49.152 MHz
Pin 24
PCIF
PCIF
PCI
PCI Frequency Select Table
Revision 101700
TS
M
M
0
0
1
1
FS
™
Early PCI Control Table
EMI Control
Spread direction is DOWN..
0
1
0
1
0
1
EPCI#
LE#
0
1
0
1
Clock Source
MK1491-06
Tristate all clocks
PCI Low EMI
PCI (Pin 22)
33.3 MHz
37.5 MHz
Printed 11/15/00
Reserved
30 MHz
25 MHz
1 ns early
Normal
PCI
OFF
ON