hcpl-4502-560e Avago Technologies, hcpl-4502-560e Datasheet - Page 12

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hcpl-4502-560e

Manufacturer Part Number
hcpl-4502-560e
Description
Single Channel, High Speed Optocouplers
Manufacturer
Avago Technologies
Datasheet
Package Characteristics
Over recommended temperature (T
*All typicals at T
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics Table (if applicable), your
equipment level safety specification or Avago Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage, ” publication num-
ber 5963-2203E.
Notes:
10. Use of a 0.1 µf bypass capacitor connected between pins 5 and 8 is recommended.
11. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 V rms for 1 second (leakage
12. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 second (leakage
13. This rating is equally validated by an equivalent ac proof test.
12
1. Derate linearly above 70°C free-air temperature at a rate of 0.8 mA/°C (8-Pin DIP).
2. Derate linearly above 70°C free-air temperature at a rate of 1.6 mA/°C (8-Pin DIP).
3. Derate linearly above 70°C free-air temperature at a rate of 0.9 mW/°C (8-Pin DIP).
4. Derate linearly above 70°C free-air temperature at a rate of 2.0 mW/°C (8-Pin DIP).
5. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, I
6. Device considered a two-terminal device: Pins 1, 2, 3, and 4 shorted together and Pins 5, 6, 7, and 8 shorted together.
7. Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dV
8. The 1.9 kΩ load represents 1 TTL unit load of 1.6 mA and the 5.6 kΩ pull-up resistor.
9. See Option 020 data sheet for more information.
Momentary
Withstand
Voltage**
Resistance
Parameter
Input-Output
Input-Output
Input-Output
Capacitance
Derate linearly above 85°C free-air temperature at a rate of 0.5 mA/°C (SO-8).
Derate linearly above 85°C free-air temperature at a rate of 1.0 mA/°C (SO-8).
Derate linearly above 85°C free-air temperature at a rate of 1.1 mW/°C (SO-8).
Derate linearly above 85°C free-air temperature at a rate of 2.3 mW/°C (SO-8).
mode pulse signal, V
Logic Low level is the maximum tolerable (negative) dV
output will remain in a Logic Low state (i.e., V
detection current limit, I
Related Characteristics Table if applicable.
detection current limit, I
Related Characteristics Table if applicable.
A
= 25°C.
CM
, to assure that the output will remain in a Logic High state (i.e., V
I-O
I-O
Sym.
V
I
R
C
I-O
≤ 5 µA). This test is performed before the 100% Production test shown in the IEC/EN/DIN EN 60747-5-2 Insulation
≤ 5 µA). This test is performed before the 100% Production test shown in the IEC/EN/DIN EN 60747-5-2 Insulation
ISO
I-O
I-O
Device
8-Pin DIP
SO-8
Widebody
8-Pin DIP
(Option 020)
8-Pin DIP
8-Pin DIP
SO-8
Widebody
8-Pin DIP
SO-8
Widebody
A
= 0°C to 70°C) unless otherwise specified.
O
< 0.8 V).
CM
Min.
3750
5000
5000
10
10
/dt on the trailing edge of the common mode pulse signal, V
12
11
Typ.*
10
10
0.6
0.5
12
13
Max.
1
0.6
O
Units
V rms
µA
pF
> 2.0 V). Common mode transient immunity in a
O
, to the forward LED input current, I
CM
Test Conditions
t = 1 min.,
T
V
T
RH < 50%,
45% RH, t = 5 s,
V
T
T
f = 1 MHz
/dt on the leading edge of the common
A
A
A
A
I-O
I-O
= 25°C
= 25°C
= 25°C
= 100°C
= 3 kVdc,
= 500 Vdc
CM
, to assure that the
Fig.
F
, times 100.
Note
6, 11
6, 12
6, 9,
12
6, 13
6
6

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