w83977atf Winbond Electronics Corp America, w83977atf Datasheet - Page 186

• Manufacturer Part Number: w83977atf
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

10.0 SERIAL IRQ
W83977ATF supports a Serial IRQ scheme. This allows a signal line to be used to report the legacy
ISA interrupt rerquests. Because more than one device may need to share the signal serial IRQ
signal line, an open drain signal scheme is used. The clock source is the PCI clock. The serial
interrupt is transfered on the IRQSER signal, one cycle consisting of three frame types: a start frame,
several IRQ/Data frames, and one Stop frame.
Specification for PCI System, Version 6.0.
Timing Diagrams For IRQSER Cycle
Start Frame timing with source sampled a low pulse on IRQ1
PCICLK
IRQSER
Drive Source
1. Start Frame pulse can be 4-8 clocks wide.
Stop Frame Timing with Host using 17 IRQSER sampling period
PCICLK
IRQSER
Drive
1. Stop pulse is 2 clocks wide for Quiet mode, 3 clocks wide for Continuous mode.
2. There may be none, one or more Idle states during the Stop Frame.
3. The next IRQSER cycle's Start Frame pulse may or may not start immediately after the turn-around clock of the Stip Frame.
H=Host Control
H=Host Control
S
FRAME
IRQ14
None
SL
or
H
IRQ1
R
SL=Slave Control
T
START
H
Host Controller
R=Recovery
START FRAME
S
1
IRQ15
FRAME
IRQ15
R
T
R
R=Recovery
S
T
IOCHCK
FRAME
None
R
T=Turn-around
The serial interrupt scheme adheres to the Serial IRQ
S
None
IRQ0 FRAME
T
-130 -
R
T=Turn-around
I
2
T
STOP
STOP FRAME
H
Host Controller
1
S
IRQ1 FRAME
IRQ1
S=Sample
Publication Release Date:April 1998
R
R
T
W83977ATF
T
S=Sample
S
PRELIMINARY
None
IRQ2 FRAME
NEXT CYCLE
I=Idle
R
START
3
T
Revision 0.53