sak-xc2365a-72fxxl Infineon Technologies Corporation, sak-xc2365a-72fxxl Datasheet - Page 115

no-image

sak-xc2365a-72fxxl

Manufacturer Part Number
sak-xc2365a-72fxxl
Description
16/32-bit Single-chip Microcontroller With 32-bit Performance
Manufacturer
Infineon Technologies Corporation
Datasheet
Table 36
Parameter
TCK clock period
TCK high time
TCK low time
TCK clock rise time
TCK clock fall time
TDI/TMS setup
to TCK rising edge
TDI/TMS hold
after TCK rising edge
TDO valid
after TCK falling edge
TDO high imped. to valid
from TCK falling edge
TDO valid to high imped.
from TCK falling edge
TDO hold after
TCK falling edge
1) The falling edge on TCK is used to generate the TDO timing.
2) The setup time for TDO is given implicitly by the TCK cycle time.
3) The setup time for TDO is given implicitly by the TCK cycle time.
Figure 26
Data Sheet
0.5
V
DDP
JTAG Interface Timing Parameters for Lower Voltage Range
Test Clock Timing (TCK)
1)
1)
2)3)
1)
t
2
Symbol
t
t
t
t
t
t
t
t
t
t
t
1
2
3
4
5
6
7
8
9
10
18
t
1
SR
SR
SR
SR
SR
SR
SR
CC
CC
CC
CC
t
3
Min.
50
16
16
6
6
5
XC2361A, XC2363A, XC2364A, XC2365A
XC2000 Family Derivatives / Base Line
115
Values
Typ.
32
32
32
t
5
Max.
8
8
36
36
36
Unit Note /
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Electrical Parameters
t
4
Test Condition
MC_JTAG_TCK
V2.0, 2009-03
0.9
0.1
V
V
DDP
DDP

Related parts for sak-xc2365a-72fxxl