sak-xc2766x-96f66l-ac Infineon Technologies Corporation, sak-xc2766x-96f66l-ac Datasheet - Page 105

• Manufacturer Part Number: sak-xc2766x-96f66l-ac
• Description: 16/32-bit Single-chip Microcontroller With 32-bit Performance
• Manufacturer: Infineon Technologies Corporation

Preliminary
Figure 25
Note: This timing diagram shows a standard configuration where the slave select signal
Data Sheet
is low-active and the serial clock signal is not shifted and not inverted.
Master Mode Timing
Select Output
SELOx
Clock Output
SCLKOUT
Data Output
DOUT
Data Input
DX0
Slave Mode Timing
Select Input
DX2
Clock Input
DX1
Data Input
DX0
Data Output
DOUT
USIC - SSC Master/Slave Mode Timing
Transmit Edge: with this clock edge , transmit data is shifted to transmit data output .
Receive Edge: with this clock edge , receive data at receive data input is latched .
Drawn for BRGH.SCLKCFG = 00
Inactive
Inactive
t
t
10
1
First Transmit
Edge
t
t
First Transmit
Edge
14
3
B
t
. Also valid for for SCLKCFG = 01
t
12
4
Data
Data
valid
valid
103
Receive
Edge
Receive
Edge
t
t
13
5
Active
Active
Transmit
Edge
Transmit
Edge
t
XC2000 Family Derivatives
t
14
3
B
with inverted SCLKOUT signal .
Electrical Parameters
USIC_SSC_TMGX.VSD
t
t
12
4
Data
Data
valid
valid
t
Last Receive
Edge
Last Receive
Edge
t
t
t
13
5
11
2
Inactive
Inactive
V2.0, 2008-03
XC2766X