sak-xc2786x-96f66l-ac Infineon Technologies Corporation, sak-xc2786x-96f66l-ac Datasheet - Page 36

• Manufacturer Part Number: sak-xc2786x-96f66l-ac
• Description: 16/32-bit Single-chip Microcontroller With 32-bit Performance
• Manufacturer: Infineon Technologies Corporation

Preliminary
3
The architecture of the XC2786X combines advantages of RISC, CISC, and DSP
processors with an advanced peripheral subsystem in a well-balanced design. On-chip
memory blocks allow the design of compact systems-on-silicon with maximum
performance suited for computing, control, and communication.
The on-chip memory blocks (program code memory and SRAM, dual-port RAM, data
SRAM) and the generic peripherals are connected to the CPU by separate high-speed
buses. Another bus, the LXBus, connects additional on-chip resources and external
resources (see
enabling the concurrent operation of several subsystems of the XC2786X.
The block diagram gives an overview of the on-chip components and the advanced
internal bus structure of the XC2786X.
Figure 3
Data Sheet
ADC1
10-Bit
8-Bit/
8 Ch.
P15
Clock, Reset, Power Control,
Program Flash 0
Program Flash 1
Program Flash 2
8
Functional Description
256 Kbytes
256 Kbytes
256 Kbytes
32 Kbytes
System Functions
PSRAM
Block Diagram
16 Ch.
Stand-By RAM
ADC0
10-Bit
8-Bit/
Figure
Port 5
16
BRGen
GPT
T2
T3
T4
T5
T6
3). This bus structure enhances overall system performance by
P11
6
CC2
T7
T8
P10
2 Kbytes
CCU63
DPRAM
T12
T13
16
Interrupt Bus
C166SV2 - Core
...
P9
Interrupt & PEC
8
CCU60
CPU
34
T12
T13
P8
7
16 Kbytes
P7 P6
DSRAM
5
4
USIC2
RS232,
IIC, IIS
2 Ch.,
Buffer
64 x
LIN,
SPI,
P4
XC2000 Family Derivatives
8
USIC1
RS232,
IIC, IIS
2 Ch.,
Buffer
P3
64 x
LIN,
SPI,
8
Functional Description
MC_XC278X_BLOCKDIAGRAM
USIC0
RS232,
IIC, IIS
2 Ch.,
Buffer
P2
64 x
LIN,
SPI,
WDT
RTC
13
Debug Support
LXBus Control
External Bus
Control
OCDS
EBC
P1
Multi
CAN
2 ch.
8
V2.0, 2008-03
P0
XC2786X
8