zpsd211r STMicroelectronics, zpsd211r Datasheet - Page 12

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zpsd211r

Manufacturer Part Number
zpsd211r
Description
Low Cost Field Programmable Microcontroller Peripherals
Manufacturer
STMicroelectronics
Datasheet

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8.0
Operating Mode
9.0
Programmable
Address
Decoder (PAD)
Figure 3. Connecting a PSD211R to an 8-Bit Multiplexed-Bus MCU
Table 3. Bus and Port Configuration Options
NOTE: 1. Connect A16-A18 to Port C if your MCU outputs more than 16 bits of address.
The PSD211R contains two programmable arrays, referred to as PAD A and PAD B
(Figure 4). PAD A is used to generate chip select signals derived from the input address to
the internal EPROM blocks and I/O ports.
PAD B outputs to Ports B and C for off-chip usage. PAD B can also be used to extend the
decoding to select external devices or as a random logic replacement.
PAD A and PAD B receive the same inputs. The PAD logic is configured by PSDsoft based
on the designer’s input. The PAD’s non-volatile configuration is stored in a re-programmable
CMOS EPROM. Windowed packages are available for erasure by the user. See Table 4 for
a list of PAD A and PAD B functions.
The PSD211R operates in 8-bit address/data mode, enabling it to interface directly to a
variety of 8-bit multiplexed microcontrollers. It works as follows: the address/data bus
(AD0-AD7) is bi-directional and permits the latching of the address when the ALE/AS signal
is active. On the same pins, the data is read from or written to the device, depending on the
state of the control signals (WR, RD, etc.). You should connect your MCU according to the
following figure. Ports A through C can be configured according to Table 3, below.
Port
C
A
B
Your
MCU
8-bit
I/O or low-order (latched) address lines
I/O and/or CS0–CS7
A16-A18 or CS8-CS10
Configurations
R/ W or WR
AD0 -AD7
A19 / CSI
A16-A18
ALE/AS
A8 -A15
RESET
PSEN
RD/E
1
PSD211R
PB
PC
PA
I /O or CS0- CS7
OR
I /O or A0 -A7
CS8 -CS10
PSD211R Family
9

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