fsusb11 Fairchild Semiconductor, fsusb11 Datasheet
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fsusb11
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fsusb11 Summary of contents
Page 1
... MicroPak™ trademark of Fairchild Semiconductor Corporation. © 2005 Fairchild Semiconductor Corporation FSUSB11 Rev. 1.0.2 Description The FSUSB11 is a high-performance, dual Single-Pole Double-Throw (SPDT) switch designed for switching USB 1.1 signals. The device features ultra-low on resis- tance (R 2.7V supply. High bandwidth and ultra low (R ...
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... Figure 3. Pin Assignments for MSOP (Top Through View) Truth Table Control Imputs Low Logic Level D High Logic Level D © 2005 Fairchild Semiconductor Corporation FSUSB11 Rev. 1.0.2 Figure 2. Pad Assignments for Micropak Analog Symbols 10 D1 GND Pin Desciption ...
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... Recommended Operating Conditions Symbol V Supply Voltage CC V Control Input Voltage IN V Switch Input Voltage SW T Operating Temperature A Notes: 2. Unused inputs must be held HIGH or LOW. They may not float. © 2005 Fairchild Semiconductor Corporation FSUSB11 Rev. 1.0.2 Parameter (1) (1) Parameter (2) 3 Min. Max. Unit -0.5 +6 ...
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... On resistance is determined by the voltage drop between D and D 4. Δ measured at identical V ON ONmax ONmin 5. Flatness is defined as the difference between the maximum and minimum value of on resistance over the specified range of conditions. © 2006 Fairchild Semiconductor Corporation FSUSB11 Rev. 1.0 Conditions (V) 2.7 to 3.6 4.5 to 5.5 2.7 to 3.6 4.5 to 5.5 2.7 to 3.6 V ...
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... Rising/Fall Time Mis match t Total Jitter J Capacitance Symbol Parameter C Control Pin Input Capacitance Port OFF Capacitance OFF Port ON Capacitance ON © 2005 Fairchild Semiconductor Corporation FSUSB11 Rev. 1.0.2 (Continued Conditions ( 1.5V 2 50Ω 3.0V 4.5 to 5.5 ...
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... Fixture and Stray Capacitance L C Includes Fixture and Stray Capacitance L © 2006 Fairchild Semiconductor Corporation FSUSB11 Rev. 1.0.2 Logic Input Waveforms Inverted for Switches that have the Opposite Logic Sense Figure 5. Turn-On/Turn-Off Timing Figure 6. Break-Before-Make Timing Figure 7. OFF Isolation and Crosstalk 6 www ...
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... AC Loading and Waveforms Figure OFF Capacitance Measurement Setup © 2006 Fairchild Semiconductor Corporation FSUSB11 Rev. 1.0.2 (Continued) Figure 8. Charge Injection Figure 11. Skew Test Figure 12. Rise / Fall Time Mismatch Test ΔV )(C ) OUT L Figure 10. Bandwidth www.fairchildsemi.com ...
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... Leader (Start End) L10X Trailer (Hub End) Reel Dimensions Dimensions are in inches (millimeters) unless otherwise noted. Tape Size A B 7.0 0.059 (8mm) (177.8) (1.50) © 2006 Fairchild Semiconductor Corporation FSUSB11 Rev. 1.0.2 Tape Number Section Cavities 125 (typ) Carrier 5000 75 (typ 0.512 0.795 2 ...
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... Tape Dimensions for MSOP Dimensions are in millimeters (inches) unless otherwise specified. Reel Dimensions for MSOP Dimensions are in inches (millimeters) unless otherwise specified. Tape Size A 13 0.059 (12mm) (330) (1.5) © 2006 Fairchild Semiconductor Corporation FSUSB11 Rev. 1.0 0.512 0.795 (13) (20. 7.008 ...
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... Physical Dimension Dimensions are in millimeters (inches) unless otherwise noted. © 2006 Fairchild Semiconductor Corporation FSUSB11 Rev. 1.0.2 Figure 13. Pb-Free 10-Lead MicroPak, 1.6 x 2.1mm 10 www.fairchildsemi.com ...
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... Physical Dimension (Continued) Dimensions are in millimeters (inches) unless otherwise noted. Figure 14. 14-Lead Thin-Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide © 2006 Fairchild Semiconductor Corporation FSUSB11 Rev. 1.0.2 11 www.fairchildsemi.com ...
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... Physical Dimension (Continued) Dimensions are in millimeters (inches) unless otherwise noted. Figure 15. 10-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm © 2006 Fairchild Semiconductor Corporation FSUSB11 Rev. 1.0.2 12 www.fairchildsemi.com ...
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... Fairchild Semiconductor Corporation FSUSB11 Rev. 1.0.2 13 www.fairchildsemi.com ...