adg1222 Analog Devices, Inc., adg1222 Datasheet

no-image

adg1222

Manufacturer Part Number
adg1222
Description
Low Capacitance, Low Charge Injection, ?15 V/+12 V Icmos Dual Spst Switches
Manufacturer
Analog Devices, Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
adg1222BRMZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
FEATURES
<0.5 pC charge injection over full signal range
Off capacitance: 2 pF
Off leakage: 20 pA
Supply range: 33 V
On resistance: 120 Ω
Fully specified at ±15 V, +12 V
No V
3 V logic-compatible inputs
Rail-to-rail operation
10-lead MSOP package
APPLICATIONS
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Audio signal routing
Video signal routing
Communication systems
GENERAL DESCRIPTION
The ADG1221/ADG1222/ADG1223 are monolithic, complemen-
tary metal-oxide semiconductor (CMOS) devices containing
four independently selectable switches designed on an iCMOS
(industrial CMOS) process. iCMOS is a modular manufacturing
process combining high voltage CMOS and bipolar technologies.
It enables the development of a wide range of high performance
analog ICs, capable of 33 V operation, in a footprint that no
previous generation of high voltage parts has been able to achieve.
Unlike analog ICs using conventional CMOS processes, iCMOS
components can tolerate high supply voltages while providing
increased performance, dramatically lower power consumption,
and reduced package size.
The ultralow capacitance and exceptionally low charge injection
of these switches make them ideal solutions for data acquisition
and sample-and-hold applications, where low glitch and fast
settling are required. Figure 2 shows that there is minimum
charge injection over the full signal range of the device.
The ADG1221/ADG1222/ADG1223 contain two independent
single-pole/single-throw (SPST) switches. The ADG1221 and
ADG1222 differ only in that the digital control logic is inverted.
The ADG1221 switches are turned on with Logic 1 on the appro-
priate control input, and Logic 0 is required for the
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
L
supply required
±15 V/+12 V iCMOS
Low Capacitance, Low Charge Injection,
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
IN2
ADG1222. The ADG1223 has one switch with digital control
logic similar to that of the ADG1221; the logic is inverted on
the other switch. The ADG1223 exhibits break-before-make
switching action for use in multiplexer applications. Each
switch conducts equally well in both directions when on and
has an input signal range that extends to the supplies. In the off
condition, signal levels up to the supplies are blocked.
S1
D1
ADG1221/ADG1222/ADG1223
–0.1
–0.2
–0.3
–0.4
–0.5
ADG1221
0.5
0.4
0.3
0.2
0.1
0
–15
T
FUNCTIONAL BLOCK DIAGRAM
A
= 25ºC
Figure 2. Charge Injection vs. Input Voltage
SWITCHES SHOWN FOR A LOGIC 0 INPUT
IN2
–10
S1
D1
®
V
V
DD
SS
Dual SPST Switches
©2007 Analog Devices, Inc. All rights reserved.
V
V
= –5V
= +5V
ADG1223
DD
SS
–5
INPUT VOLTAGE (V)
IN1
D2
S2
= –15V
= +15V
Figure 1.
0
IN2
D1
S1
5
ADG1222
IN1
D2
S2
V
V
DD
SS
www.analog.com
10
= 0V
= 12V
15
IN1
D2
S2

Related parts for adg1222

adg1222 Summary of contents

Page 1

... The ADG1221/ADG1222/ADG1223 contain two independent single-pole/single-throw (SPST) switches. The ADG1221 and ADG1222 differ only in that the digital control logic is inverted. The ADG1221 switches are turned on with Logic 1 on the appro- priate control input, and Logic 0 is required for the Rev ...

Page 2

... ADG1221/ADG1222/ADG1223 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Dual Supply ................................................................................... 3 Single Supply ................................................................................. 4 Absolute Maximum Ratings............................................................ 6 Thermal Resistance ...................................................................... 6 ESD Caution.................................................................................. 6 REVISION HISTORY 2/07—Rev. 0: Initial Version Pin Configuration and Function Descriptions..............................7 Terminology .......................................................................................8 Typical Performance Characteristics ..............................................9 Test Circuits..................................................................................... 13 Outline Dimensions ....................................................................... 15 Ordering Guide ...

Page 3

... Rev Page ADG1221/ADG1222/ADG1223 Test Conditions/Comments V = +13 –13 ± –1 mA (see Figure 23 ± – –5 V/0 V/+ – ...

Page 4

... ADG1221/ADG1222/ADG1223 Parameter 25°C Channel-to-Channel 90 Crosstalk Total Harmonic 0.15 Distortion + Noise, THD + N –3 dB Bandwidth 960 C (Off ) S 1.7 2.2 C (Off ) D 1.7 2 (On POWER REQUIREMENTS I DD 0.001 140 I SS 0.001 Guaranteed by design, not subject to production test. SINGLE SUPPLY ± 10 GND = 0 V, unless otherwise noted. ...

Page 5

... MHz typ pF typ pF max pF typ pF max pF typ pF max μA typ 1.0 μA max μA typ 170 μA max 5/16.5 V min/max Rev Page ADG1221/ADG1222/ADG1223 Test Conditions/Comments (see Figure 25 INL INH R = 300 Ω pF ...

Page 6

... ADG1221/ADG1222/ADG1223 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter Rating GND –0 + GND +0 − Analog Inputs V – 0 mA, whichever occurs first 1 Digital Inputs GND – 0 mA, whichever occurs first ...

Page 7

... Table 5. Pin Function Descriptions Pin No. Mnemonic 1 IN1 GND IN2 Table 6. ADG1221/ADG1222 Truth Table ADG1221 INx 1 0 Table 7. ADG1223 Truth Table ADG1223 INx 0 1 IN1 IN2 1 10 ADG1221 ADG1222/ D1 GND 3 8 ADG1223 D2 ...

Page 8

... ADG1221/ADG1222/ADG1223 TERMINOLOGY I DD The positive supply current The negative supply current The analog voltage on Terminal D and Terminal The ohmic resistance between Terminal D and Terminal S. R FLAT(ON) Flatness is defined as the difference between the maximum and minimum value of on resistance, as measured over the specified analog signal range ...

Page 9

... Dual Supply S D –100 –150 –200 –250 –300 –350 –400 –450 Single Supply Figure 9. Leakage Current as a Function of Temperature, Dual Supply D Rev Page ADG1221/ADG1222/ADG1223 250 V = +15V –15V SS 200 T = +125°C A 150 T = +85°C A 100 T = +25° –40°C ...

Page 10

... ADG1221/ADG1222/ADG1223 150 –5V 100 ±4.5V BIAS 50 0 –50 –100 –150 I (OFF) + – I (OFF) + – –200 I (OFF) – (OFF) – (ON (ON) – – –250 TEMPERATURE (ºC) Figure 10. Leakage Current as a Function of Temperature, Dual Supply ...

Page 11

... LOAD = 10kΩ 0.1 0.01 10 100M 1G Rev Page ADG1221/ADG1222/ADG1223 = +15V DD = –15V SS NO DECOUPLING CAPS ON = 25ºC A DECOUPLING CAPS ON 1M 10M FREQUENCY (Hz) Figure 18. ACPSRR vs. Frequency = 25° +5V –5V +3.5V rms +15V – ...

Page 12

... ADG1221/ADG1222/ADG1223 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1 +15V SOURCE OFF DD 0 –15V DRAIN OFF 25ºC SOURCE/DRAIN –15 –10 –5 0 BIAS VOLTAGE (V) Figure 20. Capacitance vs. Bias Voltage 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1 12V SOURCE OFF DRAIN OFF 0 25ºC SOURCE/DRAIN BIAS VOLTAGE (V) Figure 21. Capacitance vs. Bias Voltage Rev ...

Page 13

... Rev Page ADG1221/ADG1222/ADG1223 I (OFF) I (OFF Figure 24. Test Circuit 2—Off Leakage I (ON CONNECT Figure 25. Test Circuit 3—On Leakage ADG1222 50% 50% 50% 50% ADG1221 90% 90 OFF ON V 50% 50 90% 90% V OUT1 0V 90% 90% V OUT2 0V t ...

Page 14

... ADG1221/ADG1222/ ADG1223 INSERTION LOSS = 20 LOG V OUT Figure 31. Test Circuit 9—Bandwidth 0.1µF AUDIO PRECISION ADG1221/ADG1222/ L 10kΩ ADG1223 GND Figure 32. Test Circuit 10—Total Harmonic Distortion + Noise NETWORK ANALYZER 50Ω OUT R L 50Ω V WITH SWITCH OUT WITHOUT SWITCH ...

Page 15

... Mini Small Outline Package (MSOP) 10-Lead Mini Small Outline Package (MSOP) 10-Lead Mini Small Outline Package (MSOP) 10-Lead Mini Small Outline Package (MSOP) 10-Lead Mini Small Outline Package (MSOP) 10-Lead Mini Small Outline Package (MSOP) Rev Page ADG1221/ADG1222/ADG1223 0.80 8° 0.60 0° 0.40 Package Option ...

Page 16

... ADG1221/ADG1222/ADG1223 NOTES ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06574-0-2/07(0) Rev Page ...

Related keywords