peb3065 ETC-unknow, peb3065 Datasheet - Page 32

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peb3065

Manufacturer Part Number
peb3065
Description
Signal Processing Subscriber Line Interface Codec Filter Slicof
Manufacturer
ETC-unknow
Datasheet

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Semiconductor Group
SCR5 Configuration Register 5
Configuration register SCR5 defines various different features.
Bit
Reset value: 20
DHP-R
LAW
FIXC
LIN
IDR
REXTEN
ENTR
DHP-R
7
Disable Receive Highpass for test reasons (see chapter 10.3)
DHP-R = 0
DHP-R = 1
PCM - law selection
LAW = 0
LAW = 1
The SLICOFI uses either fixed coefficients or the programmed ones.
FIXC = 0
FIXC = 1
fixed coefficients: (see chapter 6.2)
Linear mode selection (16 bit linear information in voice channel A (upper
byte) and B (lower byte).
LIN = 0
LIN = 1
Initialize Data RAM
IDR = 0
IDR = 1
Ringing External
REXTEN = 0 normal operation
REXTEN = 1 used for external (unbalanced) ringing
Enable Test Mode Register
ENTR = 0
ENTR = 1
H
LAW
6
FIXC
Receive Highpass Filter is enabled
Receive Highpass Filter is disabled
A-Law is selected
programmed coefficients used
fixed coefficients used
normal operation: the contents of the Test Registers are
the contents of the Test Registers can be changed
5
PCM-mode is selected
linear mode is selected
normal operation is selected
contents of Data RAM is set to 0 (for test purposes)
permanently set to the default values
-Law ( 255 PCM) is selected
LIN
4
32
IDR
3
REXTEN
Programming the SLICOFI
2
ENTR
1
PEB 3065
PEF 3065
0
0
01.98
®

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