sta559bwqs STMicroelectronics, sta559bwqs Datasheet - Page 41

• Manufacturer Part Number: sta559bwqs
• Description: 5-v, 2-a, 2.1-channel High-efficiency Digital Audio System With Qsound Qhd?
• Manufacturer: STMicroelectronics

STA559BWQS
5.6.3
5.6.4
5.6.5
5.6.6
Binary output mode clock loss detection
Table 47.
Detects loss of input MCLK in binary mode and will output 50% duty cycle.
LRCK double trigger protection
Table 48.
Actively prevents double trigger of LRCLK.
Auto EAPD on clock loss
Table 49.
When active, will issue a power device power down signal (EAPD) on clock loss detection.
IC power down
Table 50.
The PWDN register is used to place the IC in a low-power state. When PWDN is written as
0, the output will begin a soft-mute. After the mute condition is reached, EAPD will be
asserted to power down the power-stage, then the master clock to all internal hardware
expect the I
Bit
Bit
Bit
Bit
3
4
5
7
RW
RW
RW
RW
RW
RW
RW
RW
2
C block will be gated. This places the IC in a very low power consumption state.
Binary output mode clock loss detection
LRCK double trigger protection
Auto EAPD on clock loss
IC power down
RST
RST
RST
RST
1
1
0
1
PWDN
Name
Name
Name
Name
BCLE
ECLE
LDTE
Binary output mode clock loss detection enable
LRCLK double trigger protection enable
Auto EAPD on clock loss
IC power down:
0 - IC powerdown low-power condition
1 - IC normal operation
Description
Description
Description
Description
Register description
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