adl5513 Analog Devices, Inc., adl5513 Datasheet - Page 10

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adl5513

Manufacturer Part Number
adl5513
Description
1 Mhz To 4 Ghz, 80 Db Logarithmic Detector/controller
Manufacturer
Analog Devices, Inc.
Datasheet

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ADL5513
EVALUATION BOARD CONFIGURATION OPTIONS
Table 4. Evaluation Board Configuration Options
Component
C1, C2, R1
C3, C4, C5, C6,
R11, R12
C7
R2, R3 R4, R5, R10,
RL, CL
R4, R5, R10
R6, R7, R8, R9
VPOS, GND
Function
Input Interface.
The 52.3 Ω resistor in Position R1 combines with the internal input impedance of the
ADL5513 to give a broadband input impedance of about 50 Ω. C1 and C2 are dc-
blocking capacitors. A reactive impedance match can be implemented by replacing
R1 with an inductor and C1 and C2 with appropriately valued capacitors.
Power Supply Decoupling
The nominal supply decoupling consists of a 100 pF filter capacitor placed physically
close to the ADL5513 and a 0.1 μF capacitor placed nearer to the power supply input
pin. If additional isolation from the power supply is required, a small resistance maybe
installed in between the power supply and the ADL5513. (R11, R12)
Filter Capacitor
The low-pass corner frequency of the circuit that drives the VOUT pin can be lowered
by placing a capacitor between CLPF and ground. Increasing this capacitor increases
the overall rise/fall time of the ADL5513 for pulsed input signals.
Output Interface—Measurement Mode.
In measurement mode, a portion of the output voltage is fed back to the VSET pin via R4.
The magnitude of the slope of the VOUT output voltage response can be increased by
reducing the portion of V
terminating resistor or as part of a single-pole, low-pass filter.
Output Interface—Controller Mode.
In this mode, R4 must be open. In controller mode, the ADL5513 can control the gain of
an external component. A setpoint voltage is applied to Pin VSET, the value of which
corresponds to the desired RF input signal level applied to the ADL5513 RF input. A
sample of the RF output signal from this variable gain component is selected, typically
via a directional coupler, and applied to ADL5513 RF input. The voltage at the VOUT
pin is applied to the gain control of the variable gain element. A control voltage is
applied to the VSET pin. The magnitude of the control voltage can optionally be
attenuated via the voltage divider comprising R4 and R5, or a capacitor can be
installed in Position R5 to form a low-pass filter along with R4.
Temperature Compensation Interface.
A voltage source can be used to optimize the temperature performance for various
input frequencies. The pads for R8/R9 can be used for a voltage divider from the VPOS
node to set the T
by applying a voltage of V
Supply and Ground Connections
ADJ
voltage at different frequencies. The ADL5513 may be disabled by
POS
OUT
−0.7 V to this node.
that is fed back to VSET. R3 can be used as a back-
Rev. PrA | Page 10 of 12
Preliminary Technical Data
Default Value
R1 = 52.3 Ω (Size 0402)
C1 = 47 nF (Size 0402)
C2 = 47 nF (Size 0402)
C3 = 0.1 μF (Size 0402)
C4 = 100 pF (Size 0402)
C5 = 100 pF (Size 0402)
C6 = 0.1 μF (Size 0402)
R11 = 0 Ω (Size 0402)
R12 = 0 Ω (Size 0402)
C7= 1000 pF (Size 0402)
R2 = open (Size 0402)
R3 = 1 kΩ (Size 0402)
R4 = 0 Ω (Size 0402)
R5 = open (Size 0402)
R10 = open (Size 0402)
RL = CL = open (Size 0402)
R4 = open (Size 0402)
R5 = open (Size 0402)
R10 = 0 Ω (Size 0402)
R6 = open (Size 0402)
R7= 0 Ω (Size 0402)
R8 = open (Size 0402)
R9 = open Ω (Size 0402)
Not Applicable

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