adl5561acpz-wp Analog Devices, Inc., adl5561acpz-wp Datasheet - Page 15

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adl5561acpz-wp

Manufacturer Part Number
adl5561acpz-wp
Description
2.9 Ghz Ultralow Distortion Rf/if Differential Amplifier
Manufacturer
Analog Devices, Inc.
Datasheet
INPUT AND OUTPUT INTERFACING
The ADL5561 can be configured as a differential-input to
differential-output driver as shown in Figure 32. The
differential broadband input is provided by the ETC1-1-13
balun transformer, and the two 34.8 Ω resistors provide a 50 Ω
input match for the three input impedances that change with
the variable gain strapping. The input and output 0.1 μF
capacitors isolate the VCC/2 bias from source and balanced
load. The load should equal 200 Ω to provide the expected ac
performance (see the Specifications section and the Typical
Performance Characteristics section).
Table 4. Differential Termination Values for Figure 32
Gain (dB)
6
12
15.5
The differential gain of the AD5561 is dependent on the source
impedance and load, as shown in Figure 33.
The differential gain can be determined using the following
formula. The values of R
shown in Table 5.
1
1
NOTES
1. FOR 6dB GAIN (A = 2) CONNECT INPUT A TO VIP1 AND INPUT B TO VIN1.
2. FOR 12dB GAIN (A
3. FOR 15.5dB GAIN (A
/
/
AC
50Ω
2
2
R
R
AND INPUT B TO BOTH VIN1 AND VIN2.
S
S
Figure 32. Differential Input to Differential Output Configuration
A
GAIN 6dB R2 = 28.7Ω R1 = 28.7Ω
GAIN 12dB R2 = 33.2Ω R1 = 33.2Ω
GAIN 15.5dB R2 = 40.2Ω R1 = 40.2Ω
V
=
0.1µF
0.1µF
ETC1-1-13
R
S
800
Figure 33. Differential Input Loading Circuit
+
2
V
R1
V
R
R2
= 4) CONNECT INPUT A TO VIP2 AND INPUT B TO VIN2.
V
VIP2
VIP1
VIN1
VIN2
IN
= 6 ) CONNECT INPUT A TO BOTH VIP1 AND VIP2
0.1µF
0.1µF
×
10
100Ω
200Ω
200Ω
100Ω
IN
R
A
B
+
R1 (Ω)
28.7
33.2
for each gain configuration are
40.2
L
R
L
VIP2
VIP1
VIN1
VIN2
400Ω
400Ω
3.3V
5Ω
5Ω
R2 (Ω)
28.7
33.2
40.2
0.1µF
0.1µF
0.1µF
0.1µF
R
R
2
2
L
L
R
R
2
2
L
L
Rev. 0 | Page 15 of 24
(1)
Table 5. Values of R
Gain (dB)
6
12
15.5
Single-Ended Input to Differential Output
The ADL5561 can also be configured in a single-ended input to
differential-output driver, as shown in Figure 34. In this config-
uration, the gain of the part is reduced due to the application of
the signal to only one side of the amplifier. The strappable gain
values are listed in Table 6 with the required terminations to
match to a 50 Ω source using R1 and R2. Note that R1 must
equal the parallel value of the source and R2. The input and
output 0.1 μF capacitors isolate the VCC/2 bias from the source
and the balanced load. The performance for this configuration
is shown in Figure 11, Figure 14, and Figure 20.
Table 6. Single-Ended Termination Values for Figure 34
Gain (dB)
5.6
11.1
14.1
The single-ended gain configuration of the ADL5561 is dependent
on the source impedance and load, as shown in Figure 35.
AC
R
S
Figure 34. Single-Ended Input to Differential-Output Configuration
R2
GAIN 5.6dB R2 = 60Ω R1 = 27Ω
GAIN 11.1dB R2 = 69Ω R1 = 29Ω
GAIN 14.1dB R2 = 77Ω R1 = 30Ω
NOTES
1. FOR 5.6dB (A
2. FOR 11.1dB (A
3. FOR 14.1dB (A
AC
50Ω
AND INPUT B TO VIN1.
AND INPUT B TO VIN2.
VIP1 AND VIP2 AND INPUT B TO BOTH VIN1 AND VIN2.
R1
0.1µF
Figure 35. Single-Ended Input Loading Circuit
+
R2
0.1µF
0.1µF
V
R1
V
V
= 1.9) GAIN CONNECT INPUT A TO VIP1
VIP2
VIP1
VIN1
VIN2
IN
= 3.6) GAIN CONNECT INPUT A TO VIP2
= 5.1) GAIN CONNECT INPUT A TO BOTH
+
for Differential Gain
A
B
0.1µF
100Ω
200Ω
200Ω
100Ω
R1 (Ω)
27
29
30
VIP2
VIP1
VIN1
VIN2
3.3V
400Ω
400Ω
R
200
100
66.7
IN
(Ω)
0.1µF
0.1µF
5Ω
5Ω
R2 (Ω)
60
69
77
ADL5561
R
R
2
2
0.1µF
0.1µF
L
L
R
R
2
2
L
L

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