adl5902 Analog Devices, Inc., adl5902 Datasheet - Page 8

• Manufacturer Part Number: adl5902
• Description: 100 Mhz To 9 Ghz 60 Db Trupwr ? Detector
• Manufacturer: Analog Devices, Inc.

ADL5902
EVALUATION AND CHARACTERIZATION CIRCUIT
BOARD LAYOUTS
Figure 15 to Figure 19 show the evaluation board for the ADL5902.
Table 3. Bill of Materials
Compon
ent
C6, C10,
C11, C12,
R3
R7, R8,
R10, R11
C4, C5,
C7, C13,
R14, R16
R1, R2,
R6, R13,
R15
C8, C9,
R5
R9, R12
Paddle
Function/Notes
Input. The ADL5902 is single ended driven from either INHI or INLO. When driving INHI, populate C10
and C12 with an appropriate capacitor value for the frequency of operation and leave C6 and C11 open.
When driving INLO, populate C6 and C11 with an appropriate capacitor value for the frequency of operation
and leave C10 and C12 open. R3 is the input termination resistor and is chosen to give a 50 ohm input
impedance over a broad frequency range.
VTGT. R10 and R11 are set up to provide 1V to VTGT from VREF. If R10 and R11 are removed, an external
voltage can be used. Alternatively, R7 and R11 can be used to form a voltage divider for an external reference.
Power Supply Decoupling. The nominal supply decoupling consists of a 100 pF filter capacitor placed
physically close to the ADL5902, a 0 Ω series resistor, and a 0.1 μF capacitor placed close to the power
supply input pin. The 0 Ω resistor can be replaced with a larger resistor to add more filtering; however,
it is at the expense of a voltage drop.
Output Interface (Default Configuration) in Measurement Mode. In this mode, a portion of the output
voltage is fed back to the VSET pin via R6. Using the voltage divider created by R6 and R2, the magnitude
of the slope at VOUT is increased by reducing the portion of VOUT that is fed back to VSET. If a fast
responding output is expected, the 0 Ω resistor on R15 can be removed to reduce parasitics on
the output.
Output Interface in Controller Mode. In this mode, R6 must be open and R13 must have a 0 Ω resistor.
In controller mode, the ADL5902 can control the gain of an external component. A set point voltage is
applied to the VSET pin, the value of which corresponds to the desired RF input signal level applied to
the ADL5902. If a fast responding output is expected, the 0 Ω resistor on R15 can be removed to reduce
parasitics on the output.
Low-Pass Filter Capacitors. The low-pass filter capacitors reduce the noise on the output and affect the
pulse response time of the ADL5902. This capacitor should be as large as possible.
TADJ/PWDN. The TADJ/PWDN pin controls the amount of intercept temperature compensation
and/or shuts down the device. The evaluation board is configured to control this from a test loop, but
VREF can also be used with a voltage divider created by R9 and R12.
The paddle should be tied to both a thermal and electrical ground
Rev. PrD | Page 8 of 11
Preliminary Technical Data
Default Value
C6 = open,
C10=C12=0.1 μF
C11 = open,
R3 = 60.4 Ω,
R7=R8=0 Ω,
R10 = 953 Ω,
R11 = 1.69 kΩ,
C4 = C5 = 100 pF,
C7 = C13 = 0.1μF,
R14 = R16 = 0 Ω
R1= R6 = R15 = 0 Ω
R2 = R13 = open,
C8 = open,
C9 = 0.1 μF,
R5 = 0 Ω
R9 = R12 = open