bu6939fv ROHM Co. Ltd., bu6939fv Datasheet - Page 4

• Manufacturer Part Number: bu6939fv
• Description: Voice Synthesis Lsi
• Manufacturer: ROHM Co. Ltd.

◆Pin name
*1) At SIO_ENBL ="L", VSEL4, VSEL3, VSEL2, VSEL1, VSEL0 is valid, and SIO is invalid.
*2) At no setting CLK setting Register, Clock is 16.384MHz at CLK16SEL="H",,4.096MHz at CLK16SEL ="L".
*3) pin #8 and pin #9 should be connected in a shortest pass, and attach capacitance(>10uF) as following figure.
NO.
PIN
10
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
11
1
2
3
4
5
6
7
8
9
VSEL3/SYNCREQ
TSEVENT/BUSY
VSEL4/BFULLB
VSEL0/RXCB
VSEL1/RXD
VSEL2/TXD
VDD1.8_IN
CLK16SEL
SIO_ENBL
Pin Name
DACOUT
REFOUT
TESTEN
RESETB
VDD_IN
SPISCK
SPICEB
VDD_IN
REG18
APOFF
SPISO
XOUT
STBY
SPISI
GND
GND
GND
GND
XIN
I/O
－
IO
IO
－
－
－
IO
－
－
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
Table Pin name Detailed table
GND
tune number pin#2 / Serial Interface output data
tune number pin#1 / Serial Interface input data
tune number pin#0 / Serial Interface CLK
Playing / ending flag("H":playing "L":stop)
accessing Flash ROM ("H"：busy "L"：not busy)
tune number pin#3 / Synchronous character request
GND
Core power supply input
Core power supply output
Standby ("H" oscillation stop) normally “L”
Test Input(“L” fixation）
Power supply input
Clock for serial SPI-ROM
Serial output data to serial SPI-ROM
Serial Input data from serial SPI-ROM
chip enable for serial SPI-ROM
GND
tune number pin#4 /command buffer Full signal
Analog Circuit Power off
Clock selection
“H”:16.384Mhz mode “L”:4.096MHzmode
LSI TEST Pin
(attach capacitance(>10uF))
DAC Output
GND
Power supply input
Reset pin (low active)
Selection of host interface(SIO or direction pin input
Oscillation cell input
Oscillation cell Output
REV. A
*2
("H" synchronization error)
*2
※
Function
3)
※
3)
*1)
)
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